Field Effect Transistor Working in Tamil

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FET- Field-Effect Transistor Construction and working principle of Operation.
A Field Effect Transistor (FET) is a three-terminal semiconductor device. Its operation is based on a controlled input voltage. By appearance JFET and bipolar transistors are very similar. However, BJT is a current controlled device and JFET is controlled by input voltage. Most commonly two types of FETs are available.

Junction Field Effect Transistor (JFET)
Metal Oxide Semiconductor FET (IGFET)

Junction Field Effect Transistor
The functioning of Junction Field Effect Transistor depends upon the flow of majority carriers (electrons or holes) only. Basically, JFETs consist of an N type or P type silicon bar containing PN junctions at the sides. Following are some important points to remember about FET −

Gate − By using diffusion or alloying technique, both sides of N type bar are heavily doped to create PN junction. These doped regions are called gate (G).

Source − It is the entry point for majority carriers through which they enter into the semiconductor bar.

Drain − It is the exit point for majority carriers through which they leave the semiconductor bar.

Channel − It is the area of N type material through which majority carriers pass from the source to drain.

There are two types of JFETs commonly used in the field semiconductor devices: N-Channel JFET and P-Channel JFET.

N-Channel JFET

It has a thin layer of N type material formed on P type substrate. Following figure shows the crystal structure and schematic symbol of an N-channel JFET. Then the gate is formed on top of the N channel with P type material. At the end of the channel and the gate, lead wires are attached and the substrate has no connection.
When a DC voltage source is connected to the source and the drain leads of a JFET, maximum current will flow through the channel. The same amount of current will flow from the source and the drain terminals. The amount of channel current flow will be determined by the value of VDD and the internal resistance of the channel.
A typical value of source-drain resistance of a JFET is quite a few hundred ohms. It is clear that even when the gate is open full current conduction will take place in the channel. Essentially, the amount of bias voltage applied at ID, controls the flow of current carriers passing through the channel of a JFET. With a small change in gate voltage, JFET can be controlled anywhere between full conduction and cutoff state.

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We spend the money for the college, but I learned the concept only by this type of videos😅

Kristy-mh
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Perfect video for last day preparation for exams💯

ragapriyakarthikeyan
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Sir, i am studying in PSG college of technology, coimbatore. I joined the college late and i was nervous that I don't know the topics held in analog and digital electronics. After watching all ur videos i got a clear explanation about the topics . Thank you sir❤️.

sivaadeesh
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I got an opportunity to see this nobleman lively 😍 thanks to God 🙏 for blessing me with such a kind hearted man..

m.k.barathdass
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Even though my Professor Take this topic in Advanced English... I love this man😉

dhayasekar
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sir best explanation, very helpful for basic electrical engineering semester 2

Teenu
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pratheepk
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Your way of explanation is too good sir, thankyou so much 🙏

TanishyaSM-ml
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Crystal clear explanation sir. Thank you for sharing your videos sir

birundha
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Awesome explanation sir 🔥🔥🔥 it was more simple to understand thank you soo much sir ❤

jimgilmour
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Your teaching learning process is very good sir. Thank you.

TheMariapparaj
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Ippa dan sir ellamae puryudu. Romba nandri sir.

Unicorn-yzbq
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Thank you for your clear explanation sir 👍

AJAYKUMAR-ulim
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Nice explanation sir.. Pls continue ur support..

pradeep
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Such a beautiful lecture I have ever seen this 😍

sriramjayaraman
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ஆசானுக்கு வணக்கம், மிக நன்று, நன்றி ஐயா.

manivelrmanivel
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Sir if we apply negative voltage delepetion layer decreases so that drain current will increase ? I'm i right ??

intrestingfacts
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Sir vgs negative voltage kudukura apo namakku drain current decrease aaguthu sir, vgs ah increase pandra apo depletion layer um increase aagum so namaku apovum drain current kammiya than kidaikum ah sir

tnpsc-esyb
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Conventional "I" flow from + to - then how can you get o/p in drain? 8086 no lecture on this yet, sir

hariharan-yitf
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Hello sir, I am having doubt, whether this video is for JFET

zohoaddicts