HWN - Analog Design Interview Question

preview_player
Показать описание
Hi fellow (and future) engineers!

Have you ever wondered how you should prepare on your days prior to your interview? Don't take it from us, take it from a fellow ninja who just got his offer letter from Intel!

Welcome back to another episode of Hardware Ninja! Ever wondered how to get a job as a Hardware Designer in some of the top tech companies like Microsoft, Google, Tesla, Apple, Facebook, etc?

The interview process employs many application based questions whether you're a recent college grad or an experienced applicant. It doesn't matter if you want to work for Elon Musk, Tim Cook, or the up and coming start-up you heard about. We're here with curated material of real life technical interview questions.

Please consider subscribing to the channel and supporting our movement. Prospective job seekers (including yourself some day) will benefit from this resource.

#analogelectronics
#cmos
#vlsi
#vlsidesign
#designengineer

Background Music Merry Bay - Ghostrifter Official
Рекомендации по теме
Комментарии
Автор

The output voltage at the end of section (2) is VDD*(R+R')/(2R+R'). There is no multiplication at the denominator.

MagedAlAnsary
Автор

Please add correction to the output voltage at the end of section-2. It should be R+R+R' .

amitvikrampujar
Автор

Thanx for the question. Why did you assume that MOSFET will turn on in the linear region? At the end of 1st region, VOUT= V(Drain)= VDD. The MOSFET will turn on in the Saturation thus discharging the capacitor linearly and not exponentially!!! After sometime when V(drain) falls below VDD/2 then MOSFET will act as a switch with on resistance R'. After that whatever you said is correct.

sohamlakhote
Автор

I think you mislabeled the y-axis
If not, your first clarifying question should have been "Can I assume that Vin is high enough to overcome the threshold voltage?" or something like that.

timlee
Автор

Tau = Rx . C
Rx = R || (R + R')

ams_designer_
Автор

If we assume the time constant of the capacitor is small then the will charge and discharge rapidly assuming charging upto Vdd again and discharging upto Vdd/2(appx assuming R' and R are same) and this will continue upto infinity if the waveform Vdd is as

AkashG_ti
Автор

You should have not taken the job as a member of this yt channal, but as a contractor, and not compromised on delivery of material to your viewers.

coolwinder
Автор

Initially the capacitor is charged and there’s no current through the transistor. The drain voltage should be vdd. If vin is less than vdd+vth then the transistor will turn on in saturation, which is confusing...

dodtickson
Автор

This one I'm not sure, but isn't I_tau function = Vc / ( R + R' )

Similarly at initial point vc = vdd, so peak of Ic = I_tau peak
Vdd / (R+ R`)

Great question, thanks

ams_designer_
Автор

Good to see after long time... please continue..I have some interview questions...how do I send you?

biswajit
Автор

The solution does not seems logical enough...

biswajit
Автор

Thanks ..but we really need hardware schematic design in deep.

sauravmishra
Автор

@Hadware Ninja is the time constant of the ckt is R||(R+R').C?

amitjana