Analog Devices Basic Interview Question

Hello Guys,
Small apology for the big delay but finally we are here with a new very interesting question on Inverter circuit.

Let us know if you guys have some doubt and try to answer the type of feedback and why?

Thank You :)

[bangaloriansvlog]

The same question was asked to me during my internship interview at Synopsys.

[amitbar]

A CMOS inverter with resistive feedback where transistors are self-biased in strong inversion is designed and optimized for low NF and high IIP3 in LNA

[mirzaamaan]

Please bring more such videos these are super useful

[aayushADE]

what i can think is that since no current flows inside the mosfet so output is shorted to input and both the mos comes in sat as vds= vgs which results in vout = vdd/2 as per inverter characterstics .

[qemmm]

Much appreciated sir
Very interesting and waiting next session

[AnalogABC]

bro videos are really good pls dont stop making videos

[KK-bjmq]

Very interesting,
Waiting for next session

[amitjana]

Here if R tends to infinite then there will be no feedback, if R has some finite value then the circuit will acts as a negative feedback circuit. If we set the input to 0 and break the loop and increase the voltage by some +ve amount then NMOS will be on and PMOS will be off. So as it is a CS amplifier ckt then there will be 180 degree phase shift in the op, so for increase in input output decrease, so it is a negative feedback ckt, for finite value of R. Am i right bhaiya?

[landrover]

When i try to solve the small signal gain around the switching threshold, i get the small siganl gain is (gmn+gmp)*R < 1, then this acts as a buffer otherwise as inverter...is my analysis correct ?

[ntdglobal]

I have some questions. What is the effect of rise/false time of input on transient response? When can CGD be ignored?
The resistor will be a feedforward path, not a feedback path if the voltage source is ideal.

[AnalogABC]

positive feed back ?, and ig here application of circuits might be other than inverter ig gain ? idk

[MoitreyaChaudhuriees]

there is no gate current.what about that

[kaustavguharoy]

for each of the two modes the time constant of the circuit remains same, Is it?

[maylok]

please answer me why they add capacitor at the out?