HWN - '20-year Analog IC Designer' vs Our Team (Interview Question)

Hi fellow (and future) engineers!

We deviated from our original plan to release a capacitor circuit due to the discussions around a question we posted as premium content. There are many lessons on this episode, but the main takeaway is that you need to be prepared to face arrogant interviewers. These type of interviewers don't care about your problem solving skills or potential, they only care about coming out as the smartest person in the room. Unfortunately, if you show you're smarter than them it's likely you won't get the job.

Let us know in the comments and likes if we have earned that beer!

Redacted Reddit Thread:

Reference Paper of a Minimum Current Selector:

Welcome back to another episode of Hardware Ninja! Ever wondered how to get a job as a Hardware Designer in some of the top tech companies like Microsoft, Google, Tesla, Apple, Facebook, etc?

The interview process employs many application based questions whether you're a recent college grad or an experienced applicant. It doesn't matter if you want to work for Elon Musk, Tim Cook, or the up and coming start-up you heard about. We're here with curated material of real life technical interview questions.

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Background Music Merry Bay - Ghostrifter Official

#analogelectronics
#cmos
#vlsi
#vlsidesign
#designengineer

[HardwareNinja]

"Don't miss the forest for the tree". We believe we are all well versed on 2nd and 3rd order effects as well as non-idealities. Interviews, most of the time, are conducted assuming ideal devices. Finally, be sure to check out the paper in the description of the video. This circuit is widely used as a minimum current selector.

[dwadwdawdwf]

To be honest, I agree with "Bob" at some points:
The question doesn't mention any of the device size and device ratio which need us to make a lot assumptions. The device size and the actual current of I1/I2 affect the gate voltage of all of the transistor. For example, if I2<I1, the gate voltage of M2 could potentially turn off M2 completely or make M2 very large degeneration. If you claim it is a min current selector, you need to derive detail equations of Ron of the M2, current with degen of M2 and the final current equation etc..
We don't want to be the simulation monkey. But that is based on you have the calculation 100% correct, which you don't have here. And the truth is: in industrial if you can't even prove it in simulation, nobody will buy you. You can't tape out something that the simulation doesn't even work, only with bunch of incorrect equations.
I like how you guys making these videos, but if you can't derive the equation 100% correct, don't do it, just give intuitive answer. The incorrect answer is going to mislead a lot of people here.

[nicochio]

Hi there, I really enjoyed this circuit, thanks! I think you got the main point, and I personally like calling the circuit a min(I1, I2) generator. However, for I1=I2, I think you should not say that "there is no minimum" (hear at 7:58s). Mathematically, the minimum between two equal values is the value itself. So, for I1=I2, min (I1, I2) = I1 = I2. In that specific case, the circuit produces I/2, a value which is not the minimum.

[jmell]

4:18 "The low vgs(m4) means source of M3 is low" ? I am confused because to draw less current(I2) shouldn't the source of M3 increase? Vg - Vs ---> lower Vs ---> higher I2 sounds incorrect. I think the source of M3 increases, Vg - Vs ---> higher Vs ---> lower I2 which is < I1. Help me on this.

[flinxsl]

I think the challenge of giving a mixed signal/analog interview is presenting devices in a configuration that the person being interviewed hasn't seen before so they can think out what happens, but still have it be simple enough so it is not a spaghetti mess. Solving a DC operating point of something and then asking something like "which device falls out of saturation first as the input increases" is totally fair and expected.

[pnjunctin]

"if both are equal, then what is the minimum?" uhhhh min(x, x)=x

[saurabhdhiman]

Thank you for the nice video!
One query:
When I2 > I1; Vgs of M4 is high. That's understandable. But,
"If I2 is high, source of M3 will be high" (Time stamp : 3:40) --- How you jump to this conclusion?

[thadwilkinson]

I understand where "Bob" is coming from. Not saying anyone is right or wrong, but depending on the biasing will totally change the way the circuit behaves...including different than the description in the discussion.

[mohdkhairizulkalnain]

This is a fresh take on current mirrors! Love it! Never knew a selection function could be built by simple current mirrors. Also love the analogy too. It's amazing how you can come up with analogies on the fly. In an interview, I'd probably think of the inverter analogy only after it's over. Looking forward to more vids!

[volodymyrsotnikov]

Working as Analog IC design engineer. Was present on the numerous interviews from both sides. Few comments:
1. Open ended questions without details. 100% something to expect during the interview. The additional questions that candidate asks will easily show his knowledge level.
2. I like the way of working out the interview problem that you showing in your videos. Doing analysis out loud, making assumptions and not just giving the answer or say “i don’tknow” - that certainly the right way to crack the interview.
3. I agree with “Bob” that you’re probably not really a specialist in analog ic design. You’re making a lot of silly mistakes and miswords. So I would not recommend to learn technical stuff from your videos, but rather learn the way of working and try to solve or read how to solve the problem on your own.
4. I bet no fresh graduate will go farther than “this is cascode current source circuit” and if sizing and currents are correct, cascode is working, else - not. Idea of minimum current selector is quite not trivial and without reading the papers about “feedback class ab output stages” papers or books or something simillar, i would not expect answers into the right direction.
5. I personally used such circuit in the real silicon, as a part of ab output stage. Works perfectly well, one of my favourite architectures now.

[jeffwu]

Thank you so much for the sharing. In fact, this circuit is a well-known min. current selecting circuit. One can find a improved version using feedback control. See chapter 2 "operational amplifter speed and accuracy imrovement" by Vadim Ivanov, which is the best book for amplifer design.

[GianlucaACDC]

I just finished my degree and now I am doing my fist interviews so I really appreciate this content. Greets from Chile!!

[bokaj]

I did the simulation, it seems that it does indeed pick a lower current, but is not a very good system, as evaluated it is off by a factor of 2 when the current are equal. I don't think bob was wrong, but i don't think this is analysis is wrong either. The difference in current will have to large for the system to work, so it works under some conditions.

[carlosvalverdeb]

I agree Bob did lost perspective of it being an interview question and showed arrogance, but friend, your comments in the video are as arrogant as his. Please don't fall in the same game.

[StFrancis-of-the-Cross]

How you arrive at your answer, the thought process, the assumptions and how you communicated those to your team mates are more important than being right. The best answer is arrived at when the team is in sync with each other. IC Design is a team play.
I thought the circuit presented was a current modulator i.e. I2 modulates I1. Varying I2 varies VDS1 and I1 will change slightly due to channel length modulation by VDS1. But i enjoyed listening to your thought process.

[venkatbabu]

When you do designs it is frequency matching.

[jiesteve]

Which subreddit is that? Looks entertaining.

[raymondribas]

This is a quite tricky problem and the complete answer is Iout= ( I1 .I2)/(I1+I2)( if we suppose that all the transistors are identical).Personally I will never test a candidate with a such problem.To be fair it is a trivial problem (for me ) but a real nightmare for most Analog designers to find the result that I have just provide.Also is quite odd what you say in the video you have just solved it either I1>>I2 or I2>>I1 and what you say when I1=I2=I we get Iout=I/2.Now the real questions are what is (are )the imperfection(s) and how to solve it (them)?

[dhaneshprabhu]

This is just insane. It opened up so many pipes in my brain. I would love to be a regular visitor to this channel. Thanku team. Cheers

[fernandocarrion]

Great content, thank you!

Loved the analysis without taking any higher order effects, it's simple and elegant. Of course, we need to be a bit flexible here to buy your answer, which is kind out of the box. Would never get to the min function selection without guidance. To be fair, this sounds like interviewer function to drive the answer to this direction. Expected answer would be the cascode current mirror with I2>I1 (assuming proper sizes), Then, the interviewer could ask: "what if I1>I2" and so on...

Bob failed miserably in understanding the "ideal" scenario. However, I think you should buy him a beer anyway, he seemed stressed.

Liked the inverter analogy to reinforce your point too.