verilog interview questions part 5 | verilog tutorial MCQ 5

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Verilog MCQ | Interview questions
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Комментарии
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Sir Very Good Explanation for the Questions of Week 5. Understood the concepts in association with the Questions of this week's assignment of Week 5.
Thank You Sir

criss_royy
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sir pls upload week 6 assignment solutions also

yoman
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In Q4 (5:25), X = 5 << 3 must be equal to 8'b00101000. So that, out = X[5] = 1.

nguyentraiquangtrung
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Sir week 5 programming assignment 2 ??

vinayvinu
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sir for qn no 9 a & d will be answer

sushmasingh
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I missed submitting my assignment for the first 3 weeks. If I submit my assignments correctly from the 4th week onwards, can I still get a certificate?

azzymlbb
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