PD Lec 8 - Netlists | PD Inputs part-2 | VLSI | Physical Design

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This is a 8th video on flagship series of physical design by @VLSI Academy
It is very important video for freshers.

Interested in learning STA [Static Timing Analysis] ?
Here's a link for Full series [till advanced level]:

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Amazing work you are doing with these videos. I wasn't able to find anything on youtube that goes into the details of Physical design like you have. I hope you realize the impact your work has on people's professional lives. Thank you :)

qkckhkc
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Hello sir please explain about tools and command in physical design

prakashbadhavath
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Good morning Sir,
I had a small doubt regarding the difference between an RTL netlist and synthesized netlist. What is the difference between them? At which state each of them are used ?

By the way, great content, helped me to build my base for PD engineering!!

yashasvikhare
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Hi sir
Interviewer asked one question.
What happens if we give RTL code as a input to pd instead of gate level netlist?

vijaya
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Sir where r u from ...if ur Start pd course ...I will plan to join course

thejuashwini
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Who will give all the input to pd engineer?like lib, lef and all?

janapadakannadasongs