Find the small signal gain and Output impedance by inspection_Details analysis

All the concepts discussed here is actually asked in interview for analog Engineer prof by Texas instruments,micron,STM,Analog Devices,Steradian Semiconductor,Lemon flip solutions,Intel ,cirel system,Nxp,HCL Tech etc

#gain
#smallsignalgain
#analog_circuits
#outputimpedance
#transimpedance_Amplifier
#analogdesign

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All important interview question-
*Analog Design Engineer Interview Question:

[RutvikPatel-pnnj]

correction in the question no 4. in small signal analysis Drain will be open ckt so small signal current gmVgs is zero and gm can't be zero as it is biased with constant current source so vgs=0 so vin=vout . so gain will be 1

[sumanbaur]

In the 3rd question how can you say by intuition that the output resistance is infinite when looking towards the mos with degeneration?

[krishnasreenivas]

Good morning sir
I seen ur notification in linkedin regarding analog circuit design engineer recruitment.
Present i have 2years experience can I eligible now

[jagadeesh]

for the 1st circuit the gain will be 0 if we ignore CLM right? because of ideal current source

[yogeshwarsinghyadav]

There is no any clarification in any question all questions have different methods to solve please elaborate the answers

[yavuzkilic]

...just out of curiosity, why do you keep repeating "...nothing but..." when you explain things? just say what it is you are saying, instead of saying "nothing but" so often... it might make your YouTube video style far better... then there are a few more pronunciation issues here and there, however you could perhaps try to work on fixing those as well (for example when pronouncing words like "one", "infinite", and when you refer to say 5 V as "5 Voltage" instead of "5 Volts" etc...)