Kirchhoff’s Voltage Law (KVL)

Kirchhoff's Voltage Law (KVL) states that the algebraic sum of voltages (or "voltage drops") must equal zero around a loop of a circuit. To use it, we pick a direction (usually clockwise) and trace around a loop. Every time you enter an element through it's positive terminal, add it, and every time you enter an element through its negative terminal, subtract it. Set that expression all equal to zero, and you will be able to solve for the unknown voltage drop. If you know all voltage drops in a loop, then you can use KVL to test that you have the correct values.

This video is part of a full free course on electric circuits. The course covers DC circuits, circuit laws, current & voltage sources, series & parallel resistors, nodal analysis, mesh analysis, and AC circuits. Links to the course are here:

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[djtfan]

Hey, absolutely love your videos! Will you at one point cover Thermodynamics or Fluid Mechanics? Your style of teaching helps me understand thing more intuitively. Keep it up, don't stop doing what you're doing!

[celiousorange]

I'm new to this but can you tell me why in the first example, the first variable V1 is a negative, from my knowledge it is because it starts at a negative terminal, so therefore it's a negative number, but then goes to high potential and still is a negative while in the node example, it starts at 0 then goes towards the source from low potential to high potential but then instead of going -9, it goes +9, and again I think it's because it goes from low potential to high potential but, in one question it is a negative number but in another question it is a positive number? Can you help me?