verilog interview questions Part-2 | verilog tutorial MCQ 2

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#verilog verilog multiple choice questions and answers
verilog basics, net, register, gate primitives, behavioral description, synthesis concepts, delays, time scale in verilog, instantiation rules. etc
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Usefull for job interviews on :
digital system design using verilog
hdl programming using verilog
digital design using verilog hdl
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video contents:

0:00 Introduction
0:28 Assign Statement
2:15 net and registers
6:10 primitive gates of verilog
8:00 time scale calculation
11:25 use of wand wiredand
13:00 connectivity of lower modules
16:00 operators in verilog

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comment your answers if anything wrong with option or values

ExploreElectronics

Your explanation with reference from lecture helped me in linking . Great effort . God bless you.

sandipks

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