AXI Wrapping Calculation

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#axi #amba_axi #amba #vlsi #system_verilog #system-verilog #uvm #system-verilog-coding #vlsi_design_verification #verilog

We are providing VLSI Front-End Design and Verification training (Verilog, System-Verilog, UVM, AMBA protocols) for fresher/professionals over weekends with job assurance, for more info can Whatsapp @ 9997615007

This session will helpful to understand that how to calculate wrapping address and their upper and lower boundary.

AMBA- AXI session 1
AMBA- AXI session 2

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We are providing VLSI Front-End Design and Verification training (Verilog, System-Verilog, UVM, AMBA protocols) for fresher/professionals over weekends with job assurance, for more info can Whatsapp @ 9997615007

emicrobyte

thanks for simplified and clear explanation

kiruravoori

Thank you for uploading the video. Explained in very simple and good understanding manner. Expecting more videos to fallow up.

bhavanirompally

Q1)How you take awburst=2?
Q2)Upper boundary= lower wrap boundary+total no. Of transfers.
In this total no of transfers i.e., awlen =4. U took 16.

smartsudhakar

Please make more videos on AXI, there more things in AXI

Mahabala.Gaming

Theory is avail every where but as new bee, i can not imagine practical application or use-case for wrap. If you can help me to make understand that

hardiksharma

Burst address calculation is (Start address / (len * size) ) * (len * size)
Which means (len * size ) will cancel out each other. So is it always start address ?

phanikrishna

Sir can you please upload more video of UVM and axi protocal dut part and testbench etc please sir
Thank you sir.

rajeevbharadwaj

FIrst of all great
1) why you have incremented as 4 in last address calculation i.e. 0x1004, 0x1008, 0x100c, as we have taken awsize*awlen i.e. 4*4 =16, then you should have added 16 into it why 4?
2)while wrapping it will go to its starting position i.e.0x1004 or to its lower boundary i.e. 0x1000?

anilmohanty

Please upload video on write address and write data operation

techspecialinformation

Sir can you upload videos on testbenc of system verilog

harikumarharish

Can you write any two test cases for AXI

naveedmohammad

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