PCB Vias 101 - Phil's Lab #77

Basics, guidelines, and best practices for vias in PCB designs. From sizing, to placement, to transfer and stitching vias, and more!

[SUPPORT]

[GIT]

[TIMESTAMPS]
00:00 Introduction
00:44 Altium Designer Free Trial

01:00 Via Basics
01:53 Via Parameters
04:50 Recommended Parameters
05:56 Via Current Handling
07:45 Via Placement
09:42 Voiding
11:16 Transfer Vias
13:07 Stitching Vias #1 (Tying Pours Together)
14:12 Stitching Vias #2 (Shielding)
14:42 Stitching Via Spacing

16:38 Outro

[imagiro]

Darn - every time a new video comes out I have to redo all my boards...

[km-electronics]

Excellent video as usual. Vias are at the heart of many manufacturability and reliability issues.

During a course, our instructor mentioned this story. A company had issues with this military grade PCB having an intermittent issue that only happens in the field but not during lab testing. It turned out that some of their vias weren't sized properly for their intended environment.

The via walls would crack due to thermal expansion after being exposed to the sun but as soon as the board cools down, the issue disappears.

[alfatech]

Everything you always wanted to know about vias (but were afraid to ask)! 😁

[reidt]

Your videos are the reason I managed to create my senior capstone project successfully. Thanks so much for what you do!

[myetis]

seriously this guy is gifted. thank you Phil. great content as ever. If you mentioned back-drilling, microvia and etc. a bit then it would be a Bootcamp of vias :)

[happyhippr]

imo, maybe one of the most valuable electronics channel on youtubYouTube... for continuing education at that intermediate electronics level

[DustinWill]

Well Phil, I am an amateur at most everything, but after watching your vids I am reminded I am a baby EE. I always learn something new. Thanks for all you do.

[micheleabolaffio]

Top notch content! You are able to extract the best recommendations and communicate them very effectively! Keep them coming!

[andershestad]

All practical information presented very concisely! Fantastic video, I'll probably show it to some friends in my student Org. 🚀

[Coolman]

This is "grail" type info... the stuff you've always wanted to ask someone, but never did and never dug down to find the answer to. Thank you for this!

[nightdew]

Great video! Would not mind something similar for other basics such as traces, ground planes, etc.

[MrGBMonkey]

Absolutely brilliant as always Phil. Could you give any recommendations for other sources that continue on this topic and go into some of the further details you mentioned, please?

[victorgallegos]

Great ideas and tips in all your videos!! Congratulations!! may be you could talk about the interconection between analog/digital ground planes with a net tie, resistor, ferrite...or with only one big plane for all....thanks for your videos!!!! :)

[yaseentwati]

quick question, i know there isn't a 'standard via size' but since there isn't much current difference between them, what are the downsides of sticking to the smallest viable size ?

[Ghost]

You're explenation on the stitching via equation is so well done, was the explenation from a book or you just figuring it out over time because most of the time we are given equations without proper explenations to what the components actually do either individually or in smaller groups.

I think it would be quite a useful skill to have. I suppose one way I could of figured that out would be to keep an eye on the units when multiplying the different factors together to see if there is anything that stands out to me, since that is the only way I could see my self figuring this stuff out.

Real cool video though thanks for sharing your knowlege

[adiredzic]

Do have a video about tying copper pours together? You mentioned some "other rules" in the last part of this video.

[danielbilodeau]

Great video, as always. I have a question. Does adding in-pad vias to component such as QFN packages and such add cost to the manufacturing?

[ruben.w]

Hi Phil, just a quick question about the stitching vias for shielding. You mention "spacing the vias apart by L" and you give this nice drawing where L is the distance between the via centers. Is this correct, or should L be the distance between the outer points of two contiguous vias, since the radius of the vias might have effect?

[scor]

Isn't a GSSPSG layout is better for 6-layers PCB, than SGSPGS? Signal to power has a same return path as signal to ground. And considering a core between layers 2 and 3, and x3 thicker outer planes than inner ones.

[andyschnoebelen]

Why do you need any annular ring on the top and bottom plane with transfer or stand alone stitching via? Making the hole size equal the pad size would allow the transfer via to be closer to the signal via and save routing space. The plating is in the hole and connects only to the inner ground planes. Is the annular ring required for the plating?