Introduction to CPU Pipelining

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This video motivates a simple, four stage CPU pipeline and demonstrates how instructions flow through it. It shows how a conditional jump can disrupt the pipeline's function because we need to flush the pipeline. In addition, it shows how choices that software engineers make can affect how often the pipeline gets flushed.

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Breaking down technical topics like micro-electronics is not for everyone, but you've done a great job of translating something complex like a CPU pipeline into a simple, easy-to-grasp and understanding. Just thank you!

donaldwright
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Best explanation ever! Never understood pipelining very well but your explanation made it so clear. Thanks!

eliasrezaei
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Thank you, I never could before but this high level overview has helped me understand how conditional branching introduces inefficiency!

mtushar
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Thank you for this. Structured, precise and to the point. I gained +5 intelligence from just this video.

Sviskebisk
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Very nice explanation... I've been hearing about Pipelining CPUs, but until now I had no idea what they were talking about.

xedover
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I love how easy to understand this video is. Subscriber++

subhajitchatterjee
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Omg so much quality content. blessed to found out this channel

JJJ-eedc
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Superbly explained, thank you for taking the time to put this together! 😁

AlbertDongler
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Thank you for sharing knowledge selflessly!!!

dghtucs
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Thanks so much for this video. I have an interview and I'm sure they will ask me about pipelining!

THERaikami
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I'm learning scripting for now but I enjoyed this.

dougm
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Thanks for making this! This was very helpful. You also have a great voice for narration and excellent pace! May have to check out all your other videos :)

brian_kirk
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super helpful!
Really love how i understood it in no time

favourmokwenye
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Thanks so much for this video! Very clear insight of cpu pipelining for the noob I am 😊

berthorm
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Thank you for this well explanation. It's very helpful.

bowthunell
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Thank u mam you taught it so well, please suggest a book for processor architecture( computer architecture in general)

pavanchytanya
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Great job ! Thank you for the clear explanation, it is very helpful !

azd
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Yo thanks, i have a very silly doubt here we saw 4 stage instructions and the first stage is fetch cycle, right? Correct me if i am wrong... In the fetch cycle the address of the instruction fetched is given to the address reg. And now the contents of the address reg is passed on the bus, then the instruction is fetched from memory right? Is the whole thing happens only at the first stage? For more clear view i will write like this

Add reg.<--- P.C

Ctrl.bus<---read signal
Pc<--- pc+1

Add Bus<--- add reg.

Memory<---bus

Is all the thing mentioned above happens at the first cycle?

lanternarasu
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Great explained and easy to understand!

michaelcrainiciuc
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And what if I have 2 pipelines. Will the speed of the CPU double?

nourghazal