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TEXAS INSTRUMENT Interview experience part 1
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for part 2:-
Important Link :-
1. Digital Ic Design( MOS VLSI) Video link by Rabaey
a) By Rabaey
B) By Indian professor
2. Verilog video lecture
3. Puzzle from geeksforgeeks
4. C language
5. STA - Setup time, Hold time, Setup slack, Hold Slack etc :-
6. Clock dividers (ex div by 3,5,6.5,1.5 etc) with any duty cycle :-
7. FIFO depth calculation-
I am using
About me:-
Myself JEETENDRA KUMAR DUBEY.I have done MTECH in microelectronics(RFDT) from IIT DELHI (CGPA 9.20) and BTECH in Electronics & Communication from NIT SURAT. Now I am working as Product Development Engineer at INTEL . Before MTECH I was selected by various government organizations like NIELIT, DFCCIL, BSNL. I mainly focus on MTECH admission, job interviews, branch information.
Subscribe to this channel ...in the coming days I am going to upload more video related to this
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