NEVER DO THIS TO YOUR DDR5 TIMINGS on intel (AMD works differently)

#intel #overclocking #ddr5

[Laundry_Hamper]

First shalt thou jam on the Holy F10. Then shalt thou set tRDRD_dg to eight, no more, no less. Eight shall be the number thou shalt set, and the number of the setting shall be eight. Nine shalt thou not set; neither set thou seven, excepting that Intel then round up to eight. Sixteen is right out.

[abzaman]

We are lucky that this video is free. It would be great to see a dedicated video with DD5 overclocking, like a step-by-step guide. Something like which timing should we attack first, and so on with a recommended set of kits by you. That would be a gem!

[gsuberland]

At some point I need to go through the DDR5 datasheets and make a poster diagram of how all the timings fit together, so people don't make these mistakes.

[fiHysteria]

I would hate to be the guy that shared this screenshot lmao

[wewillrockyou]

Something else to keep in mind with this is that most programs tend to send lots of memory accesses bunched up together in a short amount of time, after which they will mostly run from cache for some time. So even if your program doesn't actually saturate the full bandwidth of the memory bus when averaged out, these back to back timings are still very important to quickly get through those batches of memory accesses.

[Finite-Tuning]

This is tough stuff, your explanation may have made it even tougher. But simply matching up BIOS settings, mine were set to 8 already so I'm done. Cheers 🍻

[Markknightexeter]

Im surprised at the hate in comments, he knows a hell of a lot than any of you

[christopherjackson]

Ur ddr timings videos got a shout out on Jeff geerlings channel.

Tho I think he said "actually hardware overclocking" lol

[benjaminfrohns]

My DDR4 timings were auto set to 4. Nice. Even though I tweaked the primary timings and frequency, the board did it right. 😊
Thank you for the tip.

[Raythe]

Is there like....a dictionary on Ram timings? explaining what they are and when to mess with them?
I just want a single PDF that I can Ctrl F on to find the definitions for this stuff

[jannegrey]

wow, buildzoid video under 20 minutes ;)
Thanks for correcting this... not very smart mistake by someone.

[Numfuddle]

So if the ram is actually designed for 8 cycles between reads, why even make this a changeable parameter in the first place?

[simoSLJ]

I have to say I didn't play with my DDR5 at all.
Two systems, one with 12gen and one with 13gen, and both just 6400 MHz xmp.
I know setting xmp is a shame, I'm a normie :D and I just wanted it to be stable.
Love to follow BZ anyway, never change man!

[Multimeter]

Can we get another updated video for us casuals? Maybe not record breaking clock speeds on 14th gen, but really nice timings and clock speeds that you can be like "this is not the best, but damn this is good"

[andersjjensen]

7:18 "Do you see my point?".... Sometime the most frustrating part of youtube is that BZ can't hear that I actually said "Uh, yeah, you just explained it!" out loud :P

[willjohnsonjohnson]

Nice. A useful benchmark that works on old CPUs without AVX. I hate how a lot of bench software requires AVX, even though the tests themselves don't use it.

[blackcrov]

You know zoid post this video to win forum or discord arguments 😂

[martinfodor]

Not bad in terms of bandwidth specifically, however for better stability if you follow Jedec’s rules, WRWR should be double RDRD. It’s it written in the specs.. and it does affect the write performance. You know, there are some many ways to break the rules that make them work with a good 1DCP mobo like an apex and a good IMC. I would say it’s Pay2Win config.. if both SG are set at 8, you should try to lose / work with RRDS/L and WTRL/s..

[PolskiJaszczomb]

BZ, a protip - you can launch a new instance of a windows with your mouse middle button.

[bigcazza]

lmao that made your ddr5 slower than my ddr4
lol