Reusable Cover Group SV Functional Coverage #verilog #systemverilog #uvm

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Although the method is quite straightforward, I doubt there's any practical value. This type of functional coverage model doesn't add anything on top of code coverage. In fact, unless you do something clever on the sampling, the above technique is just a way to increase simulation runtime for no added benefits.

More interesting would be to generalize transitions and crosses, which bring more value than just field coverage.

alessandrobasili