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Clock Divider - Making an 8 Bit pipelined CPU - Part 79
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In this video I build the 3rd clock source for the main clock/reset circuit. Because I don't yet know exactly how fast this will run I build a clock divider circuit using a pair of 74LS193's to reduce the output of the a 5Mhz crystal oscillator.
This would have been an extra short video, but I go on to tidy some of the wiring up. Replace a mostly redundant latch chip with a simpler 74LS74. I also add a couple of capacitors to bias the start-up state of both the reset and mode selection latches.
This would have been an extra short video, but I go on to tidy some of the wiring up. Replace a mostly redundant latch chip with a simpler 74LS74. I also add a couple of capacitors to bias the start-up state of both the reset and mode selection latches.
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