Avnet's Mario Bergeron Discusses System-level Design with FPGA-based SoCs (Preview)

Mario Bergeron, Technical Marketing Engineer at Avnet Electronics Marketing, presents the "System-Level Design for Embedded Vision with FPGA-based Programmable SoCs" tutorial at the May 2015 Embedded Vision Summit.

FPGA-based programmable system-on-chip (SoC) devices offer capabilities beyond those found in traditional embedded processors. The programmability and vast parallel processing capabilities of the FPGA fabric allow developers to create a custom processor incorporating the interfaces and accelerators of their choice.

This presentation describes a typical development cycle for embedded vision applications on programmable SoCs, including some of the challenges that developers may encounter. Mario shares his experience and insight working with SoC FPGAs, from building a custom hardware platform, to accelerating video and image functions to hardware.

This talk is targeted to software designers who have experience with vision algorithms and who want to learn more about the development methodology for SoC FPGAs.