The New CXL Standard

The Compute Express Link standard, why it’s important for high bandwidth in AI/ML applications, where it came from, and how to apply it in current and future designs. Gary Ruggles, senior staff product marketing manager at Synopsys, talks with Semiconductor Engineering.

[jaffarbh]

That was brilliant, and answers the questions in my mind before even asking (about using multiple accelerators). Thank you guys

[bulbul]

very good video and helps understanding the concepts

[echindaplatypus]

Fantastic video, thanks for all your hard work Ed.

[samc]

Nice short tutorial ! I used to work few cubes from Gary at G*, he always explains simplified at any level. Thanks Gary.

[Alorand]

What I would like to know is if this standard could help multiple GPUs share a workload in a scalable and low latency way that would improve on what is possible with SLI or Crossfire.

[surajby]

Have some queries:
1. How does CXL achieve low latency? Is it by introducing the device biases and multiplexing three different sub protocols?
2. What do you mean by dis-aggregation? How does CXL solve this problem?

[chethanm]

we can achieve Gen1 --> Gen3 speed without going to Gen5 in CXL ?

[chethanm]

one query? CXL support Gen4 device ?