Introduction to Direct Memory Access (DMA)

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We've learned how interrupts relieve the CPU of the burden of polling, but what about the data transfer? A DMA will handle that for us. This lesson shows how.

Takeaways: At the completion of this lesson, each student should be able to:
• explain the benefits of direct memory access (DMA),
• describe the process of cycle stealing,
• explain how a cache supports the use of DMA,
• list the four things the DMA needs to complete a transfer, and
• show how different DMA configurations affect the number of memory cycles stolen per data element transfer.

#dma #io #bus
  1. Intermation
  2. interrupt
  3. direct memory access
  4. dma processor
  5. isr
  6. polled io
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Комментарии
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Just discovered this channel. Awesome. You're a very good teacher, thank you.

Harko
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Very cool overview about what DMA is! Easy to understand explanation

thuantta
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Wish I found your videos sooner! Good stuff

wtfitsdrewbritton
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Excellent teaching : the what and the why...thanks !

kyrilkaplan
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Excellent video, keep up the good work!

radioactivepeter
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So as I understand, these functions (DMA Channels) are fixed and connected to specific/predefined interfaces like timers, UART or SPI and can be configured only with corresponding interface in order to decries clock cycles for data transfer. In other words I can't choose any random interface on software level and say ok, now do data transfer for ADC for example (if there is no DMA Channel for it).
I think I got it. Thank you.

goodwill
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But sir here we use the arrays that are a run-time storage right, here it's possible for that

subashsuresh
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why DMA have number of channels? Do they help to increase the speed of transfer?

natrua