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Xilinx FPGA booting from QSPI Flash (Bitstream to Flash file using Vivado: RTL program alone)
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This demonstration shows how to generate a memory configuration file from the bitstream file to program the QSPI flash. The demo uses AC701 board from Xilinx which has Artix 7 FPGA.
This demo uses a design with RTL functionality alone. If you have a processor in your design and want to start the processor application on PowerON, then the procedure is different.
This demo uses a design with RTL functionality alone. If you have a processor in your design and want to start the processor application on PowerON, then the procedure is different.
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