Digital Design & Comp. Arch. - Lecture 6: Sequential Logic Design (ETH Zürich, Spring 2020)

Lecture 6: Sequential Logic Design
Date: March 6th, 2020

[bilgilibilgisiz]

Bu dersleri bizlerle paylaştığınız için teşekkürler.

[jcqmgps]

in future uploads, could you please use a pointer on screen as well please? got slightly confusing. maybe just highlight them in the ppt by editing the images in the slides itself i think that should be more convenient. brilliant content nevertheless!

[Tresla]

With the edge-triggered flip flops, surely the data is captured on the falling edge? It's only propagated to the output on the rising edge. So, if the input changes between the clock's falling edge and the rising edge, it won't be reflected on the output until the next clock cycle.

[tyqrjwf]

I think the light is not so smart, if there are both traffic in A and B all day, maybe one of them will never go through the street