RF Design-23: RF Layout Designs in ADS - Part 2

Learn how to perform layout design, Gerber and drill file generation from ADS for a Power Amplifier design. The technique learnt in this video can be applied to any RF/uWave PCB design using ADS.

[yaoyucao]

I've been watching these videos again and again for two years(started from the beginning of covid19), really nice videos, very good explaination

[eeengineers]

Sir can I use two Cree CGH40014F to create a cascode connection?

[hrijithk]

Sir how to give RF input to the rf rectifing circuit in ADS tool. Because i am in a new project which is rf harvesting system.
Can you tell me?

[wajidalikhan]

Thanks a lot, Anurag Sir. I am getting these warnings while doing Momentum-LSSP co-simulation. "Simulator uses frequency lower than frequency range of model. The S-parameters are extrapolated" and "S-parameters passivity is enforced". The frequency plan for em-model is the same as the sweep frequency for LSSP. Why do I have these warnings?
Your help will be greatly appreciated.

[manideepk]

sir how to generate ground layer also in gerber with respect to patch at the top

[rddinesh]

Hello sir,

What will the size of the rectangles which i place for post production tuning?
How close to the rf path can i place them?
How can I decide the clearance value?

Are there any thumb rules for the above?

[moustaphasere]

I find your videos very instructive.
You deactivated the capacitors before making the layout.
Why not also the stability resistor?

[liqingbo]

One more question, in vedio 28 min, you copy the rectangle array from another workspace. When I draw rectangle, what layer should I use ? The rectangle arrays seems not to update in schematic.

[liqingbo]

Thank you, sir! Because I use ADS 2017 and my computer is too old to update new version. But ADS 2017 don't have keepout module.Can you tell me how to realize similar function with ADS 2017?Looking forward to you reply. Thanks!

[pangsuilingeh]

good job. How do I put a label say "vout" in layout to measure my output voltage when I generate the symbol for CoSimulation?

[KreyszigCam]

Thank you for your video series. They've been very informative. Quick question. What do you suggest can be done when the addition of pads in the schematic changes the response of the lumped components especially at high frequencies?

[QuanVuVan]

Thank Sir for your video series. I have a quick question. In test layout of datasheet, I see O ohm in input_matching, What is its effect? Is it mandatory in the design?

[sukhpreetsingh]

Sir one more question when I am doing the trace option in layout then dimensions are in mil how to change it to mm to draw any transmission line and no option of keepout available under insert tab so what alternatives can be used for the same? Thank you, Sir. your videos are great help for me and waiting for your reply. Kindly reply at earliest.

[manojchugh]

Nicely explained.Could you please make video on Suspended stripline Filter from schematic to layout . Thanks in advance.

[yaoyucao]

Actually, one question, is it possible we record 1080P? or 4K if possible? Now most of the words in ADS windows are not clear, they are sort of fuzzy to recognize

[rddinesh]

Hi sir,

there is no point in simulating the layout with gaps
so we prefer direct em cosimulation
am I right

[sukhpreetsingh]

Excellent Sir, Thanks for making video on this topic.

Sir first problem that I have faced with respect to my design that there is huge gap between two transmission line that I am joining from two parts at the end of my circuit ( part of power combining network ) which has been connected via wire in schematic. Please suggest me how I will do it in layout as lines are far. Same I am facing while designing Wilkinson power divider in which I have to connect a resistance as far from the transmission lines that has been connected with wire in schematic and how I will connect it in layout .

Also please suggest which is the better way to use lumped components or transistor in layout either as lumped art work components
or gap for getting better results .

Thanks Sir. Waiting for positive response that solve my problem.

[eeengineers]

9:56 Cree device_Layout
24:57 Practical design tips: How to avoid coupling

[amalafyf]

I'm a big fan of your videos, thanks a lot. From my side, I'v a problem with my designs! Suddenly all the vias disappear! :(

[bujjibabunannepaga]

SIR PLEASE DESIGN RECTENA WITH IMPEDANCE MATCHING NETWORK