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2GHz ≠ 2GHz - Well sometimes! Dr Steve Bagley on why the clock cycles of a CPU aren't enough to measure its speed.

This video was filmed and edited by Sean Riley.

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I've learned so much about computers because of this channel. I'm very grateful.

TheRealGuywithoutaMustache
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The GHz is how fast the little legs move. But some of the runners can carry more, some go through short cuts... some have longer distance to cover. :P

TechyBen
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0:12 "Dunno... Anyway, I digest!" Had me in tears
😭😭😭

lafudge
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A nice analogy I like to show is with engines/motors, the clock speed is the RPM, but the key is that the torque is also important, and that "torque" is defined by the architecture, which is where most of the improvements happen between architectures.

It starts to fail down when you want to consider instructions which take different times, I still think it's helpful as a quick analogy. :)

exio
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I could listen to Dr. Bagley talk about this for hours. It's really important and we are now at a point where we literally can't make processors better just by speaking in terms of clock cycles alone. We require entirely new ideas about processor architecture, because the x86 model is done.

gregf
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"We can make the pipeline longer"
I'm getting visions of Pentium 4...

daanwilmer
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Why do people dislike these videos? They're so informative.

SoulJah
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What I learned today is that Fetch -> Decode - Execute is the meaning of FeDEx

VithorLeal
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The bit he left out is that CPU manufacturers have lenghtened the pipeline precisely to allow faster clock speeds.
For example an ARM7 (1995-2005) had less than 10 cycles (about 7 or 9 stages) and because each cyle does more things it's very hard to match timings and get a high clock speed.
So newer ARM Cortex (2005-today) have more than 10 cycles in their pipelines (around 15 or more). With more steps, each is smaller so that the overall clock speed can be increased. But with a longer pipeline, a full refill is a bigger waste (compared to a smaller pipeline) hence the mitigation like branch prediction and superscalar instructions (=instruction-level parallelism). It's all a trade-off that works well for some workloads and less well for others.

unperrier
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So it's practically impossible to compare processors of similar speeds without benchmark tests and even those are subjective?

kierannurmi
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It's super weird how these things progress. The 5W, 1.1GHz m3-8100Y in my new laptop outperforms the 105W, 2.4 GHz Q6600 that was in the first desktop I bought in 2008.

bartzrt
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My late 2018 mid/low range Octa-core 1.8 GHz Kryo 260 phone absolutely blows away my flagship Quad-core 2.7 GHz Krait 450 one from 2014. It's amazing what more cores and a few years of development can do.

Cyba_IT_NZ
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All very interesting, but the real question is: what do you do with continuous form paper in 2019? :-)

giampio
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There is so much things to take into consideration when it comes to comparing architectures and processors.
I do find it partly annoying when people in general look at clock speeds or pure core count, or a multiple of the two. While not taking architectural differences into account.
Though, a lot of people toss ARM under the buss due to it being RISC, and RISC surely is always worse then CISC. (Not really, depends greatly on the application, and the instruction set.)
In the end, comparing two processors can be very hard and vary extremely depending on the application. Heck, even some tasks are faster done on some cheap microcontrollers then on high end architectures...

todayonthebench
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I really wish you went into more detail on Instructions per clock, Its the reason why a MOS 6502 could beat out a Intel chip of the same period when run at the same clock speed.

NethTech
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You cut out the bubble intro :(
At 2:53 was the last shot of paper pre-bubble, it shows: 21_ → 321 → 432 → 543 (simple enough...)
3:36 is the next available shot of paper, but it has something completely different now: _43→5_4→65_→765 (a bit more difficult to grasp!)
What happened in between!? The answer: Bubble. It was not explained what that is. Just used in the next scene without explanation.

xICEx
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So it’s kind of like air lock in a fuel system ? Lol. But not. Lol. Still a great explanation. Great tutorial as usual from this amazing teacher. All these guys and girls are friggin top shelf.

woodywoodlstein
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Needed someone to explain this to me properly. Thank you.

jamiemclachlan
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Guys please please please make a video about formal verification methods. Great job with this vid!

Flankymanga
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If I am correct he explained why x86 is faster and arm is slower the x86 can do more single instructions ( per clock) than arm does it in two ( the extended model)

cctkqwk