Все публикации

1:10:29

OTA-01_Two stage op-amp design on cadence-01_ Miller's Compensation

0:16:20

Analog Circuit Design Engineer Interview _ Asymmetrical Op-amp analysis

0:13:35

Analog Circuit Design Engineer Interview _Find Overall Gm of the circuit

0:10:44

Analog Circuit Design Engineer interview_Find small signal currents with proper directions and WHY

0:05:23

Analog Circuit Design Engineer interview_ Find min. value of R2

0:05:54

Analog Circuit Design Engineer interview _ find output voltage amplitude in dBV and phase wrt input

0:05:33

Analog Circuit Design Engineer Interview_ Find Small signal gain

0:07:18

Analog Circuit Design Engineer Interview_ Find the Input impedance intuitively

0:28:40

Find Poles and Zero intuitively of LDO

0:06:19

Analog Circuit Design Engineer Interview _ Find the voltage across inductor at steady state

0:09:39

Analog Circuit Design Engineer Interview_ Find the average current trough the terminal

1:03:20

Analog Discussion-05 on Op-Amp Circuits adder,subtractor, integrator circuits with step response

0:16:09

Analog Design Engineer Interview _ Intuitive analysis to plot output waveform and find time constant

0:57:43

Analog Discussion-04 on RLC circuits with different Current excitation _ introduction of Op-amp

0:11:16

Analog Design Engineer Interview_ Find Vout(S) when S=0 and S=infinity

0:57:21

Analog Discussion-03 on RC,RL circuits intuitive transient and frequency response analysis

0:08:26

Find the small signal gain_ Non conventional Circuit Analysis

1:22:23

Analog Discussion-02 on Volatge,Current Sources,Passive C,RC circuits Transient Response, Bode plot

0:14:39

STMicroelectronics Analog Design Engineer Interview _Plot node voltages wrt Rd

0:09:59

Analog Design Engineer interview Question_ find small signal gain

0:07:41

Texas Instruments Analog Design Engineer Interview Question

0:11:50

Analog design interview/screening test question || Amit Bar

0:24:52

Analog Design Interview question on RC circuits abrupt charging_ Bode plot

0:11:39

Analog Design interview_ What is the steady state voltage at source terminal