Jim Keller: Arm vs x86 vs RISC-V - Does it Matter?

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Clip from my interview with Jim Keller

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"what limit's computer performance is predictability". That's huge quote.

oraz.
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OMG, he has explained so much, so clearly in so less time.
If you understand, you can make it simple for others.
Profound knowledge.

kartikpodugu
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I could listen to Jim Keller's insights for hours. Just serving him coffee I would feel like I'm wasting his time 😅

freakinccdevilleiv
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When I saw Jim I knew it would be insanely great explanation.

ryshask
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Clean Architecture for software seems to have vary similar principles for the creation and maintenance of clean hardware architecture. Makes a lot of sense.

lionelt.
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The parallels between CPU design and Operating System design are interesting.
Uncontrolled complexity as a result of adding features but not removing features? Totally.
Leaky abstractions as a result of 'quick fixes' and premature optinizing? Absolutely.

I'm currently writing an OS for an extremely minimal system (as in, memory measured in kilobytes, cpu speed in single digit megahertz, etc). Am at incarnation 3 of the design now. Yes, the previous 2 worked, but as I kept adding features which were 'required', things got more complex, making for more involved decisions, resulting in more overhead. Poking holes in abstraction layers did speed up some things, but ended up causing longer lasting resource contention, which ended up lowering overall performance, etc. Incarnation 3 takes all the things from the previous 2 incarnations, but with a new and clean design, with clean and unbroken abstractions, resulting in less complexity, and removal of functionality which was in the end just providing alternative ways to do the same things.

Without being a CPU designer, this discussion is still very relatable.

cstuff
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Keller is currently CTO of Tenstorrent, an AI company. They're using SiFive's RISC-V processors. What's interesting about this is that Keller is obviously keen to do his own RISC-V microarchitecture implementation. Someone who has had experience of high performance x86/x64 chips doing a RISC-V microarchiture would be really interesting. I particularly liked the way he was bullish about high performance chips with variable length instructions. RISC-V's base instruction set is fixed length 32 bit but the C extension allows for 16 bit instructions too. Because it's popular and part of the Linux ABI it would obviously be good to support. And Apple's M1 shows that you can get very high performance out of ARM64.

qfytidw
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The real power of RISC-V is in common software ecosystem (toolchains, debuggers, OSes, system libraries, etc.) that anyone can use for their own needs. Neat, clean ISA is just nice bonus on top of that.

rakpiotr
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I love how ian praises jim in his videos and jim himself is like:"F'd my future self so many times already"
Thinking about improvement i imagine

MagierMax
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you don't need branch predictor if you don't have branch :D

LaurentLaborde
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Outstanding video, I like that short format ! Every time I see Jim on YT I barely have time to finish the video.
Great subject about instruction set, as a développer I've been thinking about the mess for quite a long time.
Everything look alike now but that's good to have the point of an actual designer.
Also many thanks for having designed so many great CPUs ! If you can advocate for faster memory and lower timings overall 🙏🥳

goldnoob
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Jim is fucking brilliant. He’s also a great communicator which is super super important for running a team (and rare in tech from my personal experience)

jolness
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The thing that's neat about risc-v (if I understand), is that beyond the core design the new optional stuff is defined in optional extensions. So if I want to make a music player, I could just buy a risc-v processor that only implements the core plus just the extensions that are of use for audio encoding decoding. I could leave off stuff related to graphics for example if that had no use in my music player

manwbttcks
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Ultra cool that Jim mentioned Perl in his IPC example! I missed that in the long version interview, I tend to listen while doing something routine. From my testing, despite csr/ret having a slow reputation it was other things bottle necking code and the spaghetti from long routines and duplication lead to bugs and maintenance issues.

RobBCactive
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Great little clip going to watch more. Boy he sure is smart lol

dixztube
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I think this might be the 12th time I'm watching this video. The importance of this video cannot be overstated

esra_erimez
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You can clearly see why Jim Keller is a legend in CPU design.

sylviam
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Architecture shouldn't matter when you learn the best from each other. The issues arises when you have design decisions that's mutual exclusive in the long run and doesn't have a path forward.

jasonchen-alienroid
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"that's a problem for ron..." ... "later ron"

shanemshort
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LOL ~ I hate that, where future Jim comes back and goes "What the f ck did you do that for?"

Kneedragon
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