Presentation: Simulation of RRAM memory circuits, a Verilog-A compact modeling approach

Three different compact models for resistive RAM
are introduced in this work. The role of the conductive filaments
ohmic resistance is introduced for different filament shapes,
affecting the voltage at the gap between the filament tip and the
electrode, and therefore the device hopping current. The
temperature behavior of the devices under study is also described
with a different degree of accuracy. These models have been
implemented in Verilog-A in the ADS circuit simulator (Keysight
Technologies) to analyze several non-volatile memory circuits.
First, a single memory cell, making use of a NMOS transistor is
studied accounting for the differences of the three RRAM models,
and later on a 3x3 memory matrix is analyzed.

[samiurrahmankhan]

can you share the Verlog-A codes for practice and further development ? if there is any link for your codes can you share the link ?