Intel's Tiles vs AMD's Chiplets

Intel is moving forward with a Tiles concept, which sounds very much like AMD's Chiplet strategy. So how do they differ?

0:00 Tiles on Meteor Lake
0:18 AMD Chiplet with Serial (SERDES)
0:43 Intel Tiles with Parallel EMIB
1:15 Tile Ecosystem and cost
1:53 Pros and Cons of Tiles
2:49 Tile Strategy and 3D Packaging
3:30 Not everything going Tiles
4:24 Roadmaps?

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#techtechpotato #tiles #chiplets
Intel 7nm Meteor Lake Compute Tiles! Intel Tiles vs AMD Chiplets
Intel's Tiles vs AMD's Chiplets

[unclerubo]

"Love them to bits" must be one of the most British forms of appreciation I've ever heard. I'm not a native English speaker, though...

[alphaorg]

Every homeowner knows Tiles are the way to go with Modern Design. Easy cleaning, maintaining, and even Home Depo has them.
... am I in the wrong comment section? :))

[mcnugget]

Didn't know you had a YouTube channel. Extremely happy I stumbled upon it. Many thanks for your analysis. Cheers and best of luck with the channel!

[fotmheki]

Intel's Tiles vs AMD's Chiplets vs TechTechPotato's Chips (made out of tasty silicon, of course)

[haukionkannel]

These analytical videos are good! Keep on doing these!

[poolcatrush]

If those are "wires", is it correct to say that they can connect only the dies that are close to each other and there is no uniform connectivity in that 47-tile thing? Cuz Infinity Fabric connects everything with everything in all the ways

[scubasausage]

So its going to be a bit like playing Civilization where having certain tiles near each other affords a unique bonus?

[Steamrick]

I wonder how much the cost for the EMIB on that 47 tile moster is? I suspect it might well the the most expensive single component of ponte vecchio, though I have zero numbers to back it up.
I wonder how long Intel will stick to using a parallel design? There's a reason (or more) that the vast majority of buses have gone serial.

[pelor]

History has shown us (EE history anyway) is that while theoretically parallel links have very high throughputs, they are much more difficult to close timing with, as the speed is limited by the slowest wire, and serial connections out-speed them in the end.

If I was a betting men I would do it on EMIB only being a stopgap until they develop their own infinity fabric type interconnect

[rougenaxela]

This is perhaps a little out-there, but I find myself wondering... if some day there might end up being optical interconnects for these sorts of die-to-die links, based on silicon photonics and light-guide based interposers.

[bmurph]

Love the kitty you snuck it at the end!

[ZylonFPV]

This are going to get interesting if intel can compete again. Looking forward to years more of performance improvements!

[CaveyMoth]

I hope they use the ButterDonut Topology for their active interposer.

[artlessbene]

looks like they are glueing some chips together

[AdamFitton]

Do chiplets make chip design easier, in that you can modularise development more?

[dikbozo]

this video is exactly what I come here for. nerding out. thanks Dr.

[thiscouldntblowmore]

i just watched Eli rant how intel is dead company before watching this video, i find your take far more reasonable.

[Speak_Out_and_Remove_All_Doubt]

Do we still think there is room for TSMC manufactured 5nm monolithic CPUs this year and 3nm next year for Intel like so many prominent industry insiders are suggesting before we move onto tile based CPUs where Pat said Redwood cores and beyond would be node agnostic to allow for the likes of TSMC to help with production of different tiles?

[ander]

Ian what are the advantages of the chiplet and tile designs apart from higher yields?

[rodrigoferreiramaciel]

I mean... is it really that hard to put them together if we have a 40+ tiles model? because if it's that hard they would probably have issues with mass production I think 🤔 wonder if it's just misconception of my part though