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Code Optimization for AVX-512
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In this first session of the ALCF Many-Core Developer Sessions series, Larry Meadows, of Intel® Corporation, presents his experiences with code optimization for the AVX-512 instruction set and the Intel® Xeon PHI™ architecture.
Larry Meadows has been involved in high-performance computing since the early 1980s. His interests include compilers, parallel runtimes, performance analysis tools, microarchitecture, and performance tuning of highly parallel applications using message-passing, RDMA, threading, and vectorization. For the last several years Larry has worked for Intel on code modernization and tuning for systems using Intel® Xeon® and Xeon Phi™ processors.
Larry Meadows has been involved in high-performance computing since the early 1980s. His interests include compilers, parallel runtimes, performance analysis tools, microarchitecture, and performance tuning of highly parallel applications using message-passing, RDMA, threading, and vectorization. For the last several years Larry has worked for Intel on code modernization and tuning for systems using Intel® Xeon® and Xeon Phi™ processors.