Emulating a CPU in C++ #33 (6502) - More Debugging

I this i continue with the 6502 test program from github written by Klaus2m5 and use it to try and find and fix bugs in the 6502 implementation. I also try to fix the issue we had left over from last time with BRK/RTI.

Links:

Timestamps
0:00 Last time...
1:10 Problems with BRK
3:05 Fixing RTI
4:39 Fixing PLP Test
6:24 Fixing BRK return address
12:22 Rerun test program
13:30 Missing instruction 150
14:04 STX Zero Page Y
18:05 Rerun test program
18:59 More missing instructions
19:45 To be continued...

[sil]

Great vid series! Btw changing 0 to 1 in #if 0 / #endif would be slightly faster way of uncommenting (as opposed to always removing it ;) )

[slygamer]

From the previous video, I'm still trying to not point at the screen to the bit that says "This is the only time and place where the B flag actually exists: not in the status register itself, but in bit 4 of the copy that is written to the stack." Setting Flags.B to true in the BRK instruction is not actually correct. It should only be set in the copy pushed to the stack.

[tmbarral]

we used sometimes BRK like the TRAP for 68K. So like a system call with a function number following the BRK. Nice but that is taken a lot of cycles so it wasn't that much used ;)

[MRC]

It's not ignoring bits 5 and 4, they just don't physically exist in the CPU. Just like it says at the beginning of that section:
"While there are only six flags in the processor status register within the CPU, when transferred to the stack, there are two additional bits. These do not represent a register that can hold a value but can be used to distinguish how the flags were pushed. Some 6502 references call this the "B flag", though it does not represent an actual CPU register."

[jkobain]

These videos don't have a fancy intro/outro, they span for hours, the guy doesn't play a video game or set up pranks. Yet, it is enjoyable to watch.

[lukasz-mfri]

On my emulator test porgram fails somehow with sta absolute or something... it loops in address in tstay4 loop :(( I can't fugre out why

[lukasz-mfri]

2:32, B flag doesn't exist in CPU, it exists only on stack, thats why they say that they ignore it. You can't set it either so it will be always 0

[mshine]

I think I know why the RTI instruction goes to address + 2. It is used for debugging so the brk instruction can be substitued for a two-byte instruction without having to rearrange a whole lot of code.

[jcl]

I see you spent a lot of time figuring out the BRK stuff. I personally would have just fired up the C64 Vice emulator and just try it out and see what happens there by inspecting CPU status, stack and whatnot as it is a fully working emulator where you can break out into a monitor and step through things. :)

[cigmorfil]

7:23
I would say it does increment the PC - the reason a JSR stores the last byte of the instruction and not the address of the next instruction is where the push PC onto stack occurs:
1 - load OP code, PC++
2 - load ADL, PC++; decode JSR
3 - read stack; save ADL
4 - push PCH
5 - push PCL
6 - load ADH; PC=AD

By doing this it only needs to temporarily store an 8 bit value (the LSB of the destination).

For the BRK instruction:

The first increment occurs with *EVERY* instruction when read in the first cycle of every instruction.

The second cycle appears to increment the PC again; this is either by design or a feature.

During an interrupt these two cycles hold the PC value as it was at the start of the interrupt.