A Glimpse Into The Future Of AMD's Hybrid Design

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At AMD's Data Center & AI Technology Premiere event last week, the company revealed more information on it's upcoming Zen 4c core - codenamed "Bergamo". Gordon chats with Dr. Ian Cutress of @TechTechPotato about what he learned there, and answered the question of whether or not we will see Zen 4c cores on desktop anytime soon.

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#amd #ryzen #cpu
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I think we'll see Zen4c in mobile and embedded.

dslay
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Zen was saving grace for amd, only 1 type of CPU design, and it was used everywhere, from EPYC data centre, zen desktop and mobile, even consoles used same zen cores, but now Amd has to come up with different designs for every use cases if they want to compete better .
I like how they separated GPU and gpgpu architecture, mi300x is monster at what it does .
Its time amd design new desktop CPU and different data center CPU.

skywalker
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I don't think a 32-core Zen4c SKU for AM5 will serve a significant market demand. The reduced turbo clocks and much smaller L3 will hit hard single-threaded workloads and even coarse-threaded apps. How many customers are relying on a consumer-grade platform to run multiple VM clients full-time or an SQL server processing thousands of queries? On the other hand, low-power mobile form-factors (slim laptops, handheld consoles) might see a tangible benefit from incorporating the scaled-down Zen4 in a compact TDP limited SOC.

Ivan-prku
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As mainly a gamer, home pc user, and learning production software such as DaVinci Resolve etc …. I’m still liking to dip my toes into learning sone basics about the server market tech and learning how some things work their way into mainstream computing for all.

michaelthompson
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Doubtful that we'll see those Zen c cores on Desktop anytime soon.
However as smaller/more compact dies, appearing on laptop first, with the associated lower power draw, is very very certain to happen. Maybe not before Zen 5, but it will happen.

OneAngrehCat
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AMD already has a hybrid design in the Zen4 generation on desktop. The 12 and 16 core X3D chips are such design. While the chiplets has the same core count but the cache size and top frequency is different, the windows scheduler work is already being done. Mixing 4 and 4c will likely be more difficult as the chipelts will have different core counts, but frequency and cache differences is already handled in most cases.

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It kind of feels like AMD already has hybrid options with the I/O die and the core dies at mixed nodes or the 7950X3D with V-cache only on one die.

liaminwales
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Regarding the reason why heterogeneous compute / introducing E-cores makes so much sense, I'm just going to paste this paragraph from Andrei Frumusanu's Apple A12 E-core article:
Apple’s introduction of a heterogeneous CPU topology in one sense was one of the biggest validations for Arm designs. Having separate low(er)-power CPUs on a SoC is a simple matter of physics: It’s just not possible to have bigger microarchitectures scale down power as efficiently as if you would just use a separate smaller block. Even in a mythical perfectly clock-gated microarchitecture, you would not be able to combat the static leakage present in bigger CPU cores, and thus this would come with the negative consequence of being part of the everyday power consumption on a device, even for small workloads. Power gating the big CPU cores, and instead shifting to much smaller CPU in contrast, helps alleviate static leakage, as well as (if designed as such) improving the dynamic leakage power efficiency.

All of this is why I think hybrid core designs will be the way to go for consumer CPU platforms. And in server, depending on if your task benefits from faster cores or more cores, having both exclusively P-core and exclusively E-core designs will make so much sense. But for consumer CPUs, you have both tasks that benefit from faster cores, and tasks that benefit from more cores, hence why you'll have heterogenous compute, aside from all of the power efficiency advantages at lower power levels.

utubekullanicisi
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this may not get seen, but i remember at one of the announcements AMD said they target 25x power efficiency by 2025, i was wondering if you could figure out when that was said and see if that ended up an accurate statement. i know their performance has gone up a LOT at the same wattage but im curious if they got that much better

bradhaines
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The captions are hilarious. "Dr. Encounter", "Zen Forsey" 🤣

klfjoat
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10:09 Cinebench runs just fine on Linux, if you run it with wine or Proton. I've tested it on both Windows and Linux on the same system, and it scores about the same on both. So, there's no need to pollute your system with Windows.

nunyobiznez
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Very nerdy colab and I love it. 2 great and entertaining fellas here. Love you guys.

christophermullins
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Using Zen4c for an ultra book or chromebook to increase how long the battery last would make sense since normal people only need office, browser and video playback.

blank
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Sounds like a genius idea, most cloud web-apps and applications are database or IO bound i.e CPU is mostly doing nothing, thus no need for humongous caches.

niks
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It sounds very much like the dense cell libraries they used some 10 years ago. Reducing area by around 30% and power by 15-30% While not clocking as high as regular cells

mraei
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For me there are two interesting use-cases: Ultra-durable low-power mobile systems for remote locations or long time away from infrastructure, and a low-power, high-core-count, always-on systems for homelab servers where you run multiple VMs and containers non-stop that value energy efficiency over single-thread performance

SilnC
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From the consumer side, I worry about the available memory bandwidth. That's been an issue for years and primarily worked around with more cache, but this does the opposite. This will better handle non-accelerated workloads with lots of computationally-expensive loops to perform. Think non-accelerated encryption or video encoding.

garrettkajmowicz
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FYI, Cinebench has a core limit somewhere above 200. I saw this in an LTT video, I think...

thesupremeginge
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5:07 "AMD still hasn't designed a hybrid CPU." I think the 7950x3D counts. Different CCDs have different target frequencies, and they have different levels of cache. Same idea, really.

eugkra
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Isn't Dragon Range APU using both Zen4 and Zen4c Cores, for next year?

MaxIronsThird
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