Power Electronics WK3_2 MOSFET Turn On Characteristics

A look in the capacitances that limit the speed at which we can turn on and off a MOSFET. The Miller plateau is presented and discussed. A simple examples is provided.

[yfhenkes]

You saved me a lot of time searching for the answers behind the operation characteristics of the mosfet. THANK YOU!!!! You sir, are amazing at teaching!

[gaynzz]

14:20 I'm glad you said AVERAGE current. I see so many people making the mistake of saying dQ/dt = PEAK current which is completely wrong. Since the gate is a capacitor resistor network, the peak current can be estimated by Q/t * 5 (five time constants).

[williamogilvie]

Very good presentation of MIOSFET turn on characteristics. Really good that you show how charge control calculations are done in a design.

[gzy]

Dr. K,
Thank you very much for your videos! I'm currently binge watching all of them. I'm glad that you decided to share your knowledge with us. Hopefully YouTube will sooner or later start recommending your videos more often.

[alexnoggle]

Been confused on this all night, this veideo helped a lot.

[xImHazard]

Thank you for your Video!
I'm a electrical engineering student from germany and our professor does not explain this very well. And by using the books he refers to, it takes way too much time to extract/understand the more basic function of this behavior. In this 18 minute Video I learned more than by dealing with all this alone for 2 hours, thank you so much!

[parimimanu]

This is exactly the video I needed! Thank you.

[markolazarevic]

Thank you very much! You helped me out A LOT

[rubenhidalgocarrillo]

Hello Dr. K!
I came across your channel a while ago and the material is very good. Thank you for your videos. You are a good teacher.
I have a question about the consumption of MOSFETs.

If I am not wrong:

- The total consumption is equal to % of time in saturation multiplied by the power due to RDS(ON), added to the power due to the two switching (on / off) multiplied by the frequency.
(Proportional part of the time in saturation, plus two switchings, every period. The absolute power loss of ecah switch is independent of the frequency).

- All the power consumed by the MOSFET is transformed into heat.

If that is correct, measuring the temperature that the transistor reaches and dividing by the thermal resistance R-JC, we should have more or less the same number, is that correct?
I am doing tests with several MOSFETs to see it experimentally, and I see a very strange temperature graph: For a pwm of 10 KHz, pulses between 1% and 3% cause the temperature to rise excessively, and then it gradually drops to the calculated theoretical value. I've measured that temperature for 10, 20, 30 .... 250, and then 500, 750, 1000... 4095, with a 12 bits pwm. Lot of points.
For an IRF540, for example, the temperature reached with a duty of 2 us is 14ºC, and with 20 us it is 9ºC (above ambient temperature).
This is normal? Why can it happen?

If you find it strange and want me to send you specific information about the tests, I would be happy to do so.
(Sorry for my English, I'm Spanish, I hope you will understad that I wanted to explain...)

Thank you so much!

[nastiivii]

For the resistive load case, if the current Id = gm(Vg - Vth), why does the current Id continue to rise, despite Vg being held constant at the miller voltage?

[kamalabouzhar]

Amazing content as always! Thank you Dr. K.

[鄭峻杰-ik]

Hello Dr.k,

Thanks for your sharing. I feel much clear on how to determine a peak value of gate current so that I could choose and design a proper driver network .

[suhasshinde]

Dear Dr. K, you have explained some equations and showed plot of VGS waveform. Here a flat Miller plateau is shown for VGS. I agree with it for low side NMOS power device. But how about high side NMOS power device? Do you expect Miller region in VGS waveform for high side NMOS device during switching?

According to my understanding high side NMOS device will act as source follower (voltage gain ~1). It’s drain is connected to fixed supply voltage so CGD will not experience miller multiplication. Hence Miller region should not exist. If so, how these equations related to gate charge, CISS, COSS, CRSS, output rise/fall time will look like?

[sumantraneel]

Dr.K, I have a basic question for you. You say during start of turn on current actually flows through Cgd. My question is why does this current flow occur? I mean since capacitor is sitting at a higher voltage and charged, should we have no current to it until it is discharged or less than VGS? Consequently, why doesn't Cgd discharge via gate driver resistor as soon as bias is applied? Thank you!

[trunke]

1. I wonder why Cds could be ignored? It starts from VDD and discharges to 0.
2. What circuit model is that used in the circuit analysis? Large signal model? Which operating region?

[ranjanasg]

Hi Thanks for explanation. I have few questions.

1. In general, what all is the miller capacitance affecting.

Input cap of Mosfet will increase which will affect the previous driver, o/p cap will also increase. Is there any other effect of miller cap.
2. Does bigger plateau or smaller plateau indicate something? What effect will it have on previous stage and on current stage?

[NishanthSalahudeen]

Why the chart at 16:20 shows the drain current not falling together with rising drain voltage even though the load type considered in the discussion is resistive? Is this a mistake?

[vitaliyl]

Thanks for the good video! At 9:18 why does Vd stays high for short period when drain current rises and then starts to drop only when drain current reaches the maximum? What keeps that voltage steady and causes it to fall at exact moment current is at the peak?

[tarekneweshy]

Thank you so much for your video, I have a question on whether the switching times ( t on and t off ) of the MOSFET vary based on the load condition and the drain to source voltage or not, I know that what mostly controls the switching time characteristics is the gate driving circuit but do other variations like the V_DS and R or L value affect it as well? Thanks in advance!

[gaganb.]

Hi Dr. K, Wonderful explanation. I had a small doubt though...how do we calculate the switching time of the FET, is it the RC time constant ? In this case C=Cgs+Cgd and R=Rg....from your explanation I can see that when both capacitors are charged, the Vd finally drops and the FET is on...am I thinking it right?