Write Back Caches - Georgia Tech HPCA Part 3

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  1. Udacity
  2. high performance computer architecture
  3. multi-cores
  4. HPCA
  5. computer science
  6. Georgia Tech
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if i have 3 layer cache and i write to l2 and have a dirty bit=1 will i need to write the pervious data both to main memory and L1 or to main memory only

rotem