Optimizing a new processor architecture

Rob Landley

Now we'd like to talk about the things we've done to speed up linux, gcc, musl-libc, and the VHDL itself since we first got Linux booted on the thing ~3 years ago. We've doubled the MHZ, added SMP support, implemented futexes, ported everything to device tree, tracked down kernel and toolchain bugs of the "how did this ever work" variety (spoiler: it didn't), and even have a native compiler working on the board. We'll explain why we selected this architecture instead of i386/sparc/m68k (whose patents have had just as long to expire), scaling the processor design up to 64 bit and down to Arduino country at the same time, when the best way to go isn't clear because of tradeoffs (with a "prefetch vs cache" example), decisions about compatibility (sh2 vs sh3 system call numbers, should 64 bit mode have branch delay slots), issues with interrupts and clocks and futexes we hit modernizing an older architecture, and so on.

[rodneybrown]

It would be interesting to have j-core and perhaps Tensilica (ESP32) results to compare with the arXiv:1607.02318
The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V
(comparing the dynamic instruction counts and dynamic instruction bytes fetched for the popular proprietary ARMv7, ARMv8, IA-32, and x86-64 Instruction Set Architectures (ISAs) against the free and open RISC-V RV64G and RV64GC ISAs when running the SPEC CINT2006 benchmark suite)

[MagnusOlssonMalvik]

So that's why Pi likes to corrupt the SD cards! Is it possible to fix that somehow?

[ingframin]

buying wafers from eBay... Hiring software developers to make ASICs... Good luck!

[sumanywhere]

My Samsung 64 GB microSD card got fried by this bug.

[MatthewHolevinski]

horseshit... I don't ever want to go to a conference where speakers are given allotments of time.