RISC vs CISC - Is it Still a Thing?

People have often debated the pros and cons of CISC (Complex Instruction Set Computer) vs RISC (Reduced Instruction Set Computer), but is that debate still valid today?

#garyexplains

[paulk]

I'm an engineer at ARM (actually just about to end my work day and clicked on this video) and this was a great explanation of all these concepts. I actually didn't know about delayed branch instructions, cool! I was also surprised to learn that branch prediction didn't become standard practice until a while after it was thought of. Neat!

[laustudie]

First time i actually understand the difference between cisc and risc thanks mate <3

[greenfree]

As you said x86 is moving more aganist risc with things like micro ops.
But it goes the other way too.
With things like vector instructions(neon) and other more complex instructions Arm is moving towards cisc aswell.
I thing everyone is just aiming for that sweetspot

[amiralavi]

Only you can explain such complex stuff in such a simplified manner.

[KingsPhotographySolutions]

Got to be honest, I knew nothing about this before today. 😊 Now much more informed, thanks professor. 😁 Found this fascinating and you did an amazing job of breaking it down in a way that would be easily understood. 😊

P.s. truly this is something every computer fan should be aware of. Thanks so much for making me much more informed than I was before. I really learn a lot from your channel. 😁

[hoberdansilva]

I used to program microcontrollers in the 90s in assembler language, risc architecture was really fast and excellent for simple applications. But when things where a bit complicated I preferred x86 family as the instruction set really simplified things for me. I'm really happy to see the evolution of those architecture through the years....

[JayanandSupali]

I just felt like my brain was fed with very soft baby food of Info. My dear friend Gary, you did an exceptionally good job at simplifying this for anyone to understand. Again, ThanQ so much :-) #BigFan

[NexuJin]

Interesting video. Kinda brings me back when the Pentium came out and back than lots of computer magazines were writing about "Is RISC dead?". 20 years later ARM processor is what made the majority of the populations actually use a computer without calling it a computer!

[antonnym]

I designed a Minimal Instruction Set architecture with only 16 instructions (4-bit opcode): ADD, AND, NOT, OR, SHR, SUB, XOR, LDA, PSH, POP, STA, RDM, JC, JN, JV, JZ . If you are familiar with an 8080 or Z-80, it's like a cut-down version of that. All ALU operations result onto the stack, which is convenient because PSH and POP to/from the stack are great for transferring between registers. No CMP (compare) is needed because a compare is nothing but a sub where you don't care about the result, only the flags. All good wishes!

[MarsorryIckuatuna]

Wow, that was a lot of information right there. I lived through that period and only had the basics covered. Awesome video.

[RafaelKarosuo]

Thank you for referring the RISC I: A REDUCED INSTRUCTION SET VLSI COMPUTER paper here, also really helped your quotes and the sharp descriptions.
Great work on distilling this comparison.

[davejoubert]

I appreciate that you are hinting to your viewers the beautiful layers that sit between the instruction set and the silicon.

[dlwatib]

Excellent explanation.

RISC was a very elegant solution, but I think CISC has inherent advantages that will win out in the end. CISC programs can be shorter because the instructions can more closely express the programmer's (or at least the compiler's) intentions. That's valuable information. Techniques like branch prediction depend on having that information available. A shorter program also means fewer instruction fetches from memory, so less load on the memory bandwidth. In other words, CISC programs have more dense and less distorted information content than RISC.

RISC represents a premature optimization technique. It distorts and bloats the information content of the program for the purpose of making it easier for a specific machine implementation to understand and process. But machine instruction architectures last longer than a specific machine implementation. Historical artifacts like delayed branch instructions become needless complexity later on. Of course, the x86_64 architecture, a CISC architecture, has plenty of historical artifacts of its own that also add needless complexity, even bugs. But there's no reason to encourage the accumulation of cruft.

[cedartop]

Your explanation of RISC reminded me to my study time, when we had to program assembler on a 80C31. There you really do all that stuff, including writing the exact address to write or read into/from the RAM.

[JeremyChone]

Wow, what a great explanation. Love the last bits about the first instruction splitters and how it relates to heat/power.

[thekakan]

I love the fact that you included the microcode part.
A lot of people talking about this topic entirely forget that fact. Thanks :)

[RonnieBeck]

Concise, informative and well spoken. Thanks for awesome explanation!

[Handskemager]

So refreshing that someone actually explains it and explains the x86 splitting CISC instructions down to RISC instructions to be put down the pipeline.. ty! Will be referring to this when one of my friends doesn’t get it.

[DemiImp]

"ARM V8 consists of 3 ISAs: 64Bit AAarch64 and 32 bit ARM, which is further divided up into A32 and Thumb (16 and 32).
32-bit ARM is clearly CISC-y: variable length instructions, instructions that read/write multiple registers (push/pop), and a variety of odd instructions in Neon (floating point), just to name a few. These complex instruction crack into a variable number of ops, which is no-no in RISC.
Aarch-64 cleaned up much of the ISA, but left in plenty of things that are CISC-y: loads/store pair, load/store with auto increment, arithmetic/logic with shifts, vector ld/st instructions in Neon to do strided reads/writes, etc. Again, fairly CISC-y. ARM instructions encode more information than say your typical DEC Alpha instruction; it’s closer to x86 than Alpha/SPARC in that sense.
I think the RISC vs CISC lines have been blurred for over a decade, ever since out-of-order execution went mainstream. The advantage of RISC is clear in in-order machines. In OoO machines, not so much, with the sole exception of fixed-length instructions. ARM came from the embedded system world where lots of assembly code is handwritten. Accordingly, their ISA reflects the common usage patterns. At any rate, Cisc-y instructions are preferable to some of the oddball ISA choices made by early RISC ISAs (register windows, branch delay slots, load delay slots, reciprocal step instructions, etc)."

[lastmiles]

Always a pleasure to listen to someone that knows what they are talking about. All the way down to the wires.