FPGA Development Tutorials | Alinx AX7020 | Zynq7000 Architecture

Want to know about What is FPGA and FPGA Development Process. Details of Zynq7000 Architecture and its functional Block Diagram. How to write your very first Verilog code for FPGA Development using Xilinx Vivado Design Suite. For all this we are going to use ALINX AX7020 Development kit.

🎥Video Timeline:
[00:00] Video Introduction
[01:05] What is FPGA?
[01:40] Explanation of Zynq 7000 Architecture
[05:59] 16 Steps Process of FPGA Development
[08:29] Setting Vivado Development Environment in Windows
[10:57] SD-Card and JTAG Configuration Jumper
[11:40] Create First FPGA Development Project
[14:48] Write LED Blinking Verilog code using 50Mhz Ref Clock and Counter
[24:26] Define the I/O Pins and Create Constraints File ".XDC"
[27:39] Define Timing Constraints for 50Mhz sys_clk
[29:14] Run Synthesis and Generate Bit Stream file
[30:17] Open Hardware manager and Program the AX7020 FPGA Development kit

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✦ Important Links:
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ALINX AX7020 Development Kit for this tutorial series:
Vivado Design Suite - HLx Editions - 2020.2 Full Product Installation:
Zynq 7000 devices Documentations:

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✦ EsteemPCB Courses on Udemy:
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[marcosethais]

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