Creating Custom AXI Slave Interfaces Part 1 (Lesson 6)

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The Xilinx ZYNQ Training Video-Book, will contain a series of Videos through which we will make the audience familiar with the architecture of the ZYNQ device. Then, we will teach how one can design embedded systems for the ZYNQ using the Vivado environment.
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Thank you for taking the time to publish this. You presented a couple alternatives which I wasn't aware of that may save me a lot of time.

mariofan
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Que dios te bendiga hermano. Te doy un millon de gracias por tus aportes a la comunidad.
De nuevo, mil gracias.

johnalexandermontoya
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Excellent videos. Thanks very much for putting this out. They really make this involved/complicated process more clear and enjoyable.

pmaskale
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I cant thank you enough for this amazing series

muzfarid
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Thank you for all your hard work!. Can you update the source code link, I get page not found error! Thanks again!!

TareqAlqaisi
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Explanations are very clear. Thnank you

Radioguy
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Hi, why are you not using the "Enable Interrupt" when you create the IP ?

Embedded_Engineering
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i dont understand why adding an ID is different to add an equivalent number of bits to the address channel

jonathanb.
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Brijendra Sharma @IIT Kanpur,
My question is want to boot the Zynq Ultrascale +MPSoC(XCZU9EG-2FFVB1156E) & RFSoC(XCZU28DR-FFVD1156) devices. So i need your help that how we can simulate such booting application on vivado Hlx edition software.
Is there any simulation vedio??
Also in vivado when we create the new project, There is option of ports/ boards. Can we board for simulation for testing Booting. If yes than how we can do this job??
Please help me.

Brijendra Sharma
P Scientist @IIT Kanpur

brijendrasharma