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Deep-Dive: 112Gbps 16nm CMOS TIA with Co-Packaged Photodiodes
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Design, optimization, and optical measurement results of a transimpedance amplifier from Prof. Tony Chan Carusone's lab at the University of Toronto. Prototyped in 16nm FinFET CMOS and tested here up to 112Gbps 4-PAM and 72Gbps 2-PAM (NRZ). A sensitivity of -8.2dBm is observed for the TIA, and better with DSP equalization. Presented at CICC 2022.
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Deep-Dive: 112Gbps 16nm CMOS TIA with Co-Packaged Photodiodes
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