Lecture 9: Interrupts

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For the last two months I'm trying to understand the logic behind ARM MCUs, so I ran across many tutorials. By far you have the best presentations!
Thank you my friend!

iliassfe
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Thank you robot for the clear explanation, using an almost dead, emotionless voice.

omar-shukrimcintosh
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Although the voice in the video is not perfect, it's surprisingly good for a robot, and considering the content and explaination was excellent, I'm very happy with the final product! Subscribed.

rileystewart
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Excellent Explanation, Thank you very much Prof Yifeng

krishnasa
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Great explanaition. Thank you for your effort and great teaching skills. Best wishes.

mortenlund
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Very good class with several amazing details !!!

caioheitor
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Excellent Presentation about NVIC i have ever

mohangovind
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you make the ARM architecture story sound so clear

richardqqq
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Only complain with you is Robo voice, please upload same video in your original voice

haideralam
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Excellent Explanation, Thank you very much Prof Yifeng~~~

ningben
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What robot software reads that text? It has an amazing natural pronunciation

paulg.
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can we get the slides please? thank you for the video.

eestop
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What a great presentation! Excelent work!

Ulbert
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Wow. Now I understand interrupts for my job interview XD.

jashielp.estrada
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Thanks for the nice video. In the nested interrupt example, why isn't Pending Register for EXTI3 becomes 1 again when it is stacked and waited for DMA1_Channel2 interrupts to be finished?

shiningmickey
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64 + 4 *n, could you clarify the formula in more details, please? Thanks a million.

ngocmanprocoder
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what is meant by 64 in interrupt calculation (64+4*n)?

kaviyathangaraj
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Wahuuuu amazing video Prof. Zhu... Thanks a lot..!

kingfalconkhan
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These are great videos. Is the book having similar explanation?

VitaminVS
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@16:18
so the process of preserving environment variable(by pushing the aforementioned registers onto the stack)
cost the CPU 32-bits of addresses..
while unstacking, does it cost cpu 32-bits of address line too?
And also does ISR only do two instructions? (BX and LR)..
How much address the CPU need for this?..
So why does we need to offset 64bits of address when we want to determine the address of program ISR? (64+4xn)
From what I understand, stacking environment variables cost 32bits of
address, which corresponds to 4 bits of address is used to push a value from a register to the stack..
Does this means BX and LX
cost the CPU 4 bits of address each?
If that the case to find the next address of ISR program would be
32+4+32+4xn.
if not then,
32(for stacking)+32(for unstacking)+4(for BX and LX or any other ISR operations that might require only 4bits of address)*n(nth element of an array of ISR)

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