NAND To Tetris 5a: Creating RAM and Memory lab

00:00 - Intro
00:41 - Bit
05:43 - 16-Bit Register
08:40 - Program Counter
19:08 - Mistakes are normal and you should welcome them
19:57 - RAM8, a bank of 8 16-bit registers
27:24 - RAM64, a bank of 64 registers
31:27 - Lightning round begins
31:46 - RAM512
32:46 - RAM4K
33:17 - RAM16K
35:39 - Comments on next week and thanks for watching

Today we build the circuits needed for our computer's RAM storage subsystem, including bits, registers, addressable memory banks up to 16k, and a program counter. All the exercises can be found in the projects/03 directory of the course materials.

[AMasondude]

As usual, this man is literally saving my entire programming career

[kennet.hoffmann]

Brilliant solution to the RAM8. I spend a long time trying to solve that. Thanks for sharing.

[Gupatik]

I hate My University's way of introducing me to computer science, instead, I love being here around YouTube especially this channel since it fulfills the passion I have about The Fundamentals of Computer Architecture and the Behind Scene stuff. And After finishing this and knowing those Fundamentals, I can choose between the engineering field or High-Level programming which I'm already okay with. Thank You for every Video you make on this or even other series, either way, you are really helping people much more beginner compared to you in the field. Thanks ;)

[nunzioturtulici]

This is a great series. I was fascinated from logical circuits since I was in high school and realized you can make a computer out of them. However loved when you were so honest to correct the lazyness citation at about 7', I was thinking the same thing but I had simply forgive the imprecision and then the magic happened. Great! There should be more people thinking this way. Thank you!

[danlittlejohn]

This video explained everything incredibly more clearer than my University class. Thank you!

[elmo]

Man this is fascinating, I want to learn this stuff, I got bored from high level programming

[ASeventhSign]

This IS good youtube sir.
Watching you work things out is very valuable.

[ronronn]

why did we chop the RAM chips in half when we did the 16K chip and mess with the addressing? kind of got tripped up on that part. all the copy paste parts were making sense and just adjusting addressing to include more ram inside, until we suddenly changed it all up at the end.

[yuuyz]

Love your videos! It is weird that I learn cs watching your videos and having fun at the same time? haha

[motownlucas]

My vote would have been to diagram PC before jumping into HDL.

[Anubis]

Thank you so much sir. You help a lot with your videos.

[DavidLindes]

Huh. Interesting. I split the bits in the other direction... so e.g. in RAM64, my dmux and mux got 3..5, and the RAM8s got 0..2, and then in RAM512, the dmux got 6..8 and the RAM64s got 0..5. It passed all the tests... but I find myself wondering if it's kinda backwards? I suppose since we set ng to the 15th bit in the other thing, the higher numbers really are MSB, and so... I should probably swap this around... yup, done, and it still works... seemingly the same. Funky!

[filipbook]

My solution is essentially the exact same but I think this was easier to understand for me. I just made it based on playing around with the builtin PC chip.

Register(in=mux3Out, load=true, out=out, out=regOut);
Inc16(in=regOut, out=incOut);

Mux16(a=regOut, b=incOut, sel=inc, out=mux1Out);
Mux16(a=mux1Out, b=in, sel=load, out=mux2Out);
Mux16(a=mux2Out, b=false, sel=reset, out=mux3Out);

Should I be worried? I mean, the hierarchy is only what is different, but playing with the builtin PC chip this is what my brain came up with intuitively.

[jimsimpson]

I don’t wish to sound negative, but surely these videos aren’t giving away the answers to all the exercises in the Nand2Tetris course?

[freddiefrancis]

I have entered the exact same code for my PC chip, however when trying to enter it into the hardware simulator I get the error message, "Line 19, out(8) and out(16) have different bus widths".

[restfulcube-notyet]

Hi, I have a question. So for a register that has its "in" set equal to the output of the final mux in sequence (e.g. resetMuxOut in the PC ), what would resetMuxOut be equal to at the start of the program? Would it be 0 since it hasn't been instantiated yet?

[techvarotv]

Great video !
Is there a set of all the finished Circuits in Digital that you can download ?

[mailoisback]

My implementation of PC uses only two Mux16 gates which I think is easier to understand. Let me know if someone wants to see how its done.

[pc]

Thanks for you help!!! I can't test the bit.hdl because I can't find the bit.tst script. I have bit.class but no bit.tst script.

[NathanatUuiu]

i wish i had that innate ability. i guess i’ll have to try for getting the ability now to not make syntax errors.