RIGOL MSO2072A Logic analyzer Pattern Trigger mistriggers explanation!?

I have my MSO2072A Logic analyzer connected to an FPGA controlling 4x 7 segment display and tried to trigger with the pattern trigger
But the pattern I want to trigger on also triggers other patterns.
In this video I try to explain why I think this happens.

Sorry for the long video and my bad english, this is my first video.

[TheTweakerTweaks]

@Pascal Sweden.
Thank you for your comment.
As discussed in the other comments the root cause me be the way I hooked it up to the FPGA. Because the LED's are directly driven by the FPGA. There fore the rise/fall timing could be different with every segment.
But still, some sort of settling time function would be nice.
I don't no if there is a SW update for this.
I am pretty busy with a million thing right now and have not found a second of time to play more with this problem :-(
And for the question buying the DS1054Z or the MSO2072A.
It all depends on what you want to do with it.
The DS1054Z has 4 analogue channels witch can preform the same functions as the LA but only 4 in for bit. If you have to debug a complex system, the 16 channel LA is very handy to have.
Just think of things you want to do with it.
I just hooked it up to a 7 segment but in real live I will almost certain never going to use a 7 segment display in my project (Old skool :p )

But if you want to debug SPI you have Mosi Miso CLK and CS.
You can do that with the DS. But if you want to also measure the VDD you have to give up 1 of the other signals. Probably this is not a problem most of the time but maybe it will be.

My idea behind buying one with LA was that  I rather use it ones and find the problem. Then not finding the problem because I dint have a LA.

If I find some time I will do this experiment again with the knowledge I have now and hope that the result will be better.

[ParadigmSoftware]

I just wanted to make a quick note on your comment about the digital and analog channels not being precisely in sync.

You are correct, and if you look at the lengths of the leads on your A and D probes, I think you'll understand why that is the case (propagation delay).  Rigol built in an adjustment setting for trimming the skew between an analog channel, and the trigger point (Channel Delay Calibration).  I believe this can be used to time-align the A & D channels, by sync'ing both to the scope's internal trigger reference point. 

It's described on Page 2-8 of the MSO2000 manual I have, for the analog channels, and 7-8 for the digital channels.  Your pages may vary.

[ParadigmSoftware]

Also, when you say 'It takes a very long time for the analog channels to settle', you need to keep in mind the rise/fall times of the Cyclone outputs, when driving the loads you've got there.  The analog channels are probably pretty accurate indicators, especially since you only have 1 sample point per division.  And the agreement between the A & D will depend on where the thresholds are set on the logic channels.

[pascalsweden]

Has the root cause of this problem been identified in the mean time? Is there a bug fix available in newer SW update? Really cool video which you made. Any more videos upcoming on the LA part of your device? :) I am deciding between DS1054Z (going cheap) or MSO2072A (if LA is worth the investment).