An Introduction to RV32I Interrupts and Traps

An introduction to what IRQs and traps are and how they work on the 6502 and RV32I processors.
Errata: At 46:06 the first code at 'resume:' should save the address of the new thread's save area into the _current_thread variable!

#riscv
#rv32

[kenappleman]

You always have such great content, thank you

[namvu]

Lovely lecture as always!
I'd absolutely love to have a lecture on riscv vector extension!

[ArthurOgawa-qz]

I enjoyed the learning experience! So generous of you to put this information out here for us, Prof. Winans. 
I am curious to know how you regard the Control Data computers, like the CDC6600, in light of the current RISC lore which largely fails to mention them. I hand-wrote the instruction set on a Hollerith punch card so I could decode core dumps; it was small indeed.

[lesliedellow]

So this is supposed to be a lecture about interrupts on RISC-V processors, and we learn all about interrupts on an ancient processor, which is probably no longer made. At least it lets me feel clever, because I already know the generalities.

[ChrisJackson-jsrd]

does my memory fail me or is there an ibm lineprinter somewhere missing its paperfeed

[MrNickolay]

By the way, when they say in 6502 manual about something that gets stored in the stack, they mean some kind of hardware stack, right? Do such things exist?

[aloysious]

can you explain about software interrupt in this comment like some examples

[richardamullens]

Ancient history - and I know this because I started on the PDP-8/e.
Examples for the RP2040 would be more pertinent.