SOFICS TUTORIAL: System Level ESD Robustness

On-chip ESD protection devices are used to prevent damage during Electrostatic Discharge (ESD) stress from wafer production till the assembly of the chips on the PCB in the application. For instance, ESD stress events can occur during the process of connecting the die interfaces (bond-pads) to the package pins. Once the chip is on the board and in the system (phone, car, computer, datacenter switch, …) these on-chip ESD devices are less important.

Of course, ESD stress can also happen on system level, during the operation of the system. Special connector design, filters and system-level ESD protection devices are used to protect the sensitive chips during that kind of stress. However, despite the fact that IEC 61000-4-2 is a standard created for system level ESD stress it is frequently applied on standalone integrated circuits. In this video Thomas discusses the main questions (what, why, how) and 3 key aspects to consider.