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LEDSOC
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Building SOC RTL using ARM Cortex- m0 design start evaluation IP. This project is built for Xilinx FPGAs and I have developed the constraints files for the Nexus 4 DDR , Nexus 4 and the ARTY - A7. So, if you have one of these boards you can start building your own SOC.
The only prerequisite is Verilog. I will be uploading 2 videos per week and will be talking about all the elements you would need to build your own SOC.
I will also be sharing all the appropriate materials in the description of the videos. I am sure you will enjoy this video series.
So, if you are and SOC enthusiast and want to get started building your own SOC join me on this exciting journey.
Twitter : @TennetiSrimanth
*** For answering all the queries I have created a discord link. Do join the community and here I will be answering all the questions.
***
Do link , share and subscribe to my channel guys.
The only prerequisite is Verilog. I will be uploading 2 videos per week and will be talking about all the elements you would need to build your own SOC.
I will also be sharing all the appropriate materials in the description of the videos. I am sure you will enjoy this video series.
So, if you are and SOC enthusiast and want to get started building your own SOC join me on this exciting journey.
Twitter : @TennetiSrimanth
*** For answering all the queries I have created a discord link. Do join the community and here I will be answering all the questions.
***
Do link , share and subscribe to my channel guys.