FPGA 6502: Implement 'ROL abs' part 3 of 3

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We finally start implementing an actual opcode. This is part 3 of 3, in which set the control lines (microcode) for updating the status flags.

We also encounter a bug in the CPU design.

Project CompuSAR aims at building 70's and 80's computers on a low-end FPGA. Most of the project works from scratch, and this channel half documents the progress, half teaches about the concepts that come into play when designing such a system.

External links:

Music:
Licensed under Creative Commons: By Attribution 4.0 License

Table of contents:
00:00 Intro
00:26 Test driven development
01:17 Update the test plan
05:46 Running the test
06:54 Implement the Carry
09:08 Run test
10:05 Problem in our CPU design
12:40 Deciding on a solution
16:44 Solution reached
18:16 Verify solution
19:48 Updating N and Z flags
25:31 Wrap up
  1. Some Assembly required
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