IQ Signals

[prutser]

I like the explanation of the negative frequency. Haven't seen that so clear that far 😊

[yarenkaya]

Wow, this was exactly what I was looking for, for the homodyne receivers.The reason behind why we use 2 orthogonal signals explained beautifully!

[bodstrup]

Finally, I think I understand ‘negative frequency’. Previously - my Q was ‘How can you have less than 0 oscilations per second ?’

[fernm]

The receiver block diagram presented @4:55 shows an ADC between the IF stage and the DDC block. I thought the output of an ADC was a binary value (composed of 1's and 0'S) that represented the level of the analog signal at the sampling time. How can such a binary representation of the signal level be used by the DDC? Thank you!

[martindegourcuff]

Super clear thanks! Is there an advantage to perform IQ demodulation in FMCW since dechirping only creates by construction positive beat frequencies?

Many thanks and cheers from France

[weirdsciencetv]

I have an on-again off-again project for a SDR based on a superegenerative front end. Phase information is typically obliterated but I plan on recovering it using the fact that the tank circuit stays locked in phase with the carrier. So I want to make a circuit that can recover the phase AND amplitude of the signal in IQ form, just like a normal SDR. The idea is to eliminate the ADC and also have tremendous dynamic range. Most of the SDRs I have made suffer from artifacts when front end is overloaded.

So far I can decode things like 8-PSK, but I hope to make it work for signals in general.

[robyounce]

Nobody ever explains" why do we want to do this, to generate I and Q signals?" HOW do we use these to eliminate a Sideband?? What is the complete process?

[exponentmantissa]

That does not look like 10 Db of attenuation. Where did the 20 come from? You are dropping the signal level by a factor of 0.316 when the strength should 0.1. How is that 10 dB ???