DesignWare Controller and PHY IP for PCIe 6.0 -- Synopsys

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See a demo of Synopsys’ complete IP solution for PCIe 6.0 technology showing the controller operating at 64GT/s in FLIT mode and the PAM-4 PHY in 5-nm process achieving two orders of magnitude better BER with 32dB PCIe channel.
  1. EE Journal
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