Intro to Cache Coherence in Symmetric Multi-Processor (SMP) Architectures

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One of the biggest challenges in parallel computing is the maintenance of shared data. Assume two or more processing units share a data element and at least one of them can update that element. If that data element is contained in a cache, then we must have a mechanism for alerting the other processing units to the change.
#cache #coherence #parallel
  1. Intermation
  2. cache
  3. coherence
  4. computer
  5. organization
  6. architecture
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