2D Materials for Nanoelectronics: Prospects and Integration Challenges by Prof. Robert Wallace (UTD)

The size reduction and economics of integrated circuits, captured since the 1960’s in the form of Moore’s Law, is under
serious challenge. Current industry roadmaps reveal that physical limitations include reaching aspects associated with truly atomic
dimensions, and the cost of manufacturing is increasing such that only 2 or 3 companies can afford leading edge capabilities. To
address some of the “conventions;” material’s physical limitations, “#2D materials” such as #graphene, phosphorene, h-BN, and transition
metal dichalcogenides have captured the imagination of the research community for advanced applications in nanoelectronics,
optoelectronics, and other applications. Among 2D #materials “beyond graphene,” some exhibit semiconducting behavior, such as
transition-metal #dichalcogenides (#TMDs), and present useful bandgap properties for applications even at the single atomic layer level.
Examples include “MX2”, where M = Mo, W, Sn, Hf, Zr and X = S, Se and Te.
In addition to the potentially useful bandgaps at the monolayer thickness scale, the atomically thin layers should enable thorough
electric field penetration through the channel, thus enabling superior electrostatic control. Further, with such thin layers, the
integration with suitable gate dielectrics can result in a mobility enhancement. Applications “beyond #CMOS” are also under
exploration. From an interface perspective, the ideal TMD material may ne expected to have a dearth of dangling bonds on the
surface/interface, resulting in low interface state densities which are essential for efficient carrier transport. The ideal TMD materials
have much appeal, but the reality of significant densities of defects and impurities will surely compromise the intrinsic performance
of such device technologies. This presentation will examine the state-of-the-art of these materials in view of our research on
semiconductor device applications, and the challenges and opportunities they present for electronic and optoelectronic applications.
This research was supported in part by the Semiconductor Research Corporation (SRC) NEWLIMITS Center and NIST through award
number 70NANB17H041 and the Erik Jonsson Distinguished Chair at the University of #Texas at #Dallas.

Bio:

Research in the Wallace group focuses on the study of surfaces and interfaces, particularly with applications to electronic
materials and the resultant devices fabricated from them. Current interests include materials systems leading to concepts that may
enable further scaling of integrated circuit technology and beyond #CMOS-based logic. These include the study of the surfaces and
interfaces of compound semiconductor systems including arsenides (e.g. #InGaAs), nitrides (e.g. #GaN), phosphides (e.g. InP), as well
as antimondies (e.g. GaSb), and most recently 2D materials such as graphene and transition metal dichalcogenides. He has authored
or co-authored over 400 publications in peer reviewed journals and proceedings with over 25,000 (35,000) citations according
to Scopus (#Google Scholar). #Wallace is also an inventor on 45 US and 27 international patents/applications, and a co-inventor of
the Hf-based high-k gate dielectric materials now used by the semiconductor industry for advanced high-performance logic in
microprocessors. He was named Fellow of the #AVS in 2007 and an #IEEE Fellow in 2009 for his contributions to the field of high-k dielectrics in integrated circuits.