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COSIC seminar 'Implementing RLWE-based Schemes Using an RSA Co-Processor' (Fernando Virdia)
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COSIC seminar – Implementing RLWE-based Schemes Using an RSA Co-Processor – Fernando Virdia (Royal Holloway)
The transition to quantum-resistant cryptography will require designing, implementing, certifying and deploying new hardware capable of accelerating post-quantum cryptographic schemes. Given how slow this process can be, we look at the possibility of repurposing currently existing RSA/ECC co-processors for accelerating (ideal) lattice-based cryptography by exploiting the availability of fast long integer multiplication. Such co-processors are deployed in smart cards in passports and identity cards, secured microcontrollers and hardware security modules (HSM). In particular, we demonstrate an implementation of a variant of the Module-LWE-based Kyber Key Encapsulation Mechanism (KEM) that is tailored for high performance on a commercially available smart card chip (SLE 78).
The transition to quantum-resistant cryptography will require designing, implementing, certifying and deploying new hardware capable of accelerating post-quantum cryptographic schemes. Given how slow this process can be, we look at the possibility of repurposing currently existing RSA/ECC co-processors for accelerating (ideal) lattice-based cryptography by exploiting the availability of fast long integer multiplication. Such co-processors are deployed in smart cards in passports and identity cards, secured microcontrollers and hardware security modules (HSM). In particular, we demonstrate an implementation of a variant of the Module-LWE-based Kyber Key Encapsulation Mechanism (KEM) that is tailored for high performance on a commercially available smart card chip (SLE 78).