Understanding the Differences Between Blocking and Non-Blocking Assignments in Verilog | EP-7

This episode provides a comprehensive analysis of the key differences between blocking and non-blocking assignments in Verilog. The host begins by introducing the concepts of blocking and non-blocking assignments and provides an overview of the mechanisms that underpin these constructs. To illustrate these differences in action, the host models a 4-bit shift register using Verilog and compares the results obtained from blocking and non-blocking assignments. The episode also includes a detailed walkthrough of the Verilog code for the shift register and a discussion of the various simulation tools used, including Geany IDE, Icarus Verilog, GTK-Wave, and Vivado 2022.1 ML Edition. Additionally, the host shares some thumb rules to follow when working with blocking and non-blocking assignments in Verilog and concludes with a summary of the key takeaways from the episode. Overall, this episode offers a valuable resource for anyone looking to deepen their understanding of Verilog and its many features and capabilities.

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In this episode we have discussed the below topics :
00:00 Beginning & Intro
00:40 Chapter Index
01:46 Introduction to Blocking And Non-Blocking Assignments
06:59 Infographics : Blocking-Vs-Non-Blocking
11:18 Blocking Assignments
16:15 Blocking Mechanism
17:41 Non-Blocking Assignments
21:30 Non-Blocking Mechanism
23:52 More Blocking Vs Non-Blocking Examples
29:06 Thumb Rules To Follow
33:49 Summary
36:01 Verilog Code Tour of 4-Bit Shift Register
40:18 Code Simulation : Geany IDE + Icarus Verilog + GTK-Wave
43:19 Code Simulation : Vivado 2022.1 ML Edition

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References, Acknowledgements & Credits :
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